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author | 2016-03-03 18:22:02 +0100 | |
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committer | 2016-03-03 18:42:44 +0100 | |
commit | 7e437bce90ba9bff3df570f337304df1ce1a4fbd (patch) | |
tree | 8656147292b9b67482248a739193d161f86a3426 | |
parent | 76f78ec39af1f3af5a0b1f351aa95761cd2dd6eb (diff) |
Use CRC32 instruction only when build for SSE4.2 enabled platforms
This fixes SIGILL crash observed on Penryn CPU
Change-Id: I960878d88f0f088847d4d86605ef082f6600e2c7
Signed-off-by: Damjan Marion <damarion@cisco.com>
-rw-r--r-- | vppinfra/vppinfra/bihash_24_8.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/vppinfra/vppinfra/bihash_24_8.h b/vppinfra/vppinfra/bihash_24_8.h index c0dff8cc..e2ad8f91 100644 --- a/vppinfra/vppinfra/bihash_24_8.h +++ b/vppinfra/vppinfra/bihash_24_8.h @@ -38,7 +38,7 @@ static inline int clib_bihash_is_free_24_8 (clib_bihash_kv_24_8_t *v) return 0; } -#if !defined(__powerpc64__) && !defined(__aarch64__) +#if __SSE4_2__ static inline u32 crc_u32(u32 data, u32 value) { |