diff options
Diffstat (limited to 'scripts/automation')
3 files changed, 19 insertions, 8 deletions
diff --git a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py index dbaafd45..22a63ddd 100644 --- a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py +++ b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py @@ -141,12 +141,12 @@ class CStlBasic_Test(functional_general_test.CGeneralFunctional_Test): p = [ ["udp_1pkt_1mac_override.py","-m 1 -l 50",True], - ["syn_attack.py","-m 1 -l 50",False], # can't compare random now + ["syn_attack.py","-m 1 -l 50",True], # can't compare random now ["udp_1pkt_1mac.py","-m 1 -l 50",True], ["udp_1pkt_mac.py","-m 1 -l 50",True], ["udp_1pkt.py","-m 1 -l 50",True], ["udp_1pkt_tuple_gen.py","-m 1 -l 50",True], - ["udp_rand_len_9k.py","-m 1 -l 50",False], # can't do the compare + ["udp_rand_len_9k.py","-m 1 -l 50",True], # can't do the compare ["udp_1pkt_mpls.py","-m 1 -l 50",True], ["udp_1pkt_mpls_vm.py","-m 1 ",True], ["imix.py","-m 1 -l 100",True], @@ -183,13 +183,14 @@ class CStlBasic_Test(functional_general_test.CGeneralFunctional_Test): ["udp_1pkt_mac_mask2.py","-m 1 -l 20 ",True], ["udp_1pkt_mac_mask3.py","-m 1 -l 20 ",True], ["udp_1pkt_simple_test2.py","-m 1 -l 10 ",True], # test split of packet with ip option - ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True] + ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True], + ["udp_1pkt_mac_mask5.py","-m 1 -l 30 ",True] ]; - p1 = [ ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True] ] + p1 = [ ["udp_rand_len_9k.py","-m 1 -l 50",True] ] for obj in p: diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py index 713769b6..e27563eb 100644 --- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py +++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py @@ -246,7 +246,7 @@ class CTRexVmInsWrFlowVar(CTRexVmInsBase): assert type(is_big_endian)==bool, 'type of is_big_endian is not bool' class CTRexVmInsWrMaskFlowVar(CTRexVmInsBase): - def __init__(self, fv_name, pkt_offset,pkt_cast_size,mask,shift, is_big_endian=True): + def __init__(self, fv_name, pkt_offset,pkt_cast_size,mask,shift,add_value, is_big_endian=True): super(CTRexVmInsWrMaskFlowVar, self).__init__("write_mask_flow_var") self.name = fv_name assert type(fv_name)==str, 'type of fv_name is not str' @@ -258,6 +258,8 @@ class CTRexVmInsWrMaskFlowVar(CTRexVmInsBase): assert type(mask)==int, 'type of mask is not int' self.shift = shift assert type(shift)==int, 'type of shift is not int' + self.add_value =add_value + assert type(add_value)==int, 'type of add_value is not int' self.is_big_endian = is_big_endian assert type(is_big_endian)==bool, 'type of is_big_endian is not bool' @@ -590,7 +592,7 @@ class CTRexVmDescWrFlowVar(CTRexVmDescBase): self.pkt_offset = t[0] class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase): - def __init__(self, fv_name, pkt_offset, pkt_cast_size=1, mask=0xff, shift=0, offset_fixup=0, is_big=True): + def __init__(self, fv_name, pkt_offset, pkt_cast_size=1, mask=0xff, shift=0, add_value=0, offset_fixup=0, is_big=True): super(CTRexVmDescWrMaskFlowVar, self).__init__() self.name =fv_name assert type(fv_name)==str, 'type of fv_name is not str' @@ -599,13 +601,16 @@ class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase): self.pkt_offset =pkt_offset self.pkt_cast_size =pkt_cast_size assert type(pkt_cast_size)==int,'type of pkt_cast_size is not int' - if not (pkt_cast_size in [1,2,4,8]): + if not (pkt_cast_size in [1,2,4]): raise CTRexPacketBuildException(-10,"not valid cast size"); self.mask = mask assert type(mask)==int,'type of mask is not int' self.shift = shift assert type(shift)==int,'type of shift is not int' + self.add_value = add_value + assert type(add_value)==int,'type of add_value is not int' + self.is_big =is_big; assert type(is_big)==bool,'type of is_big_endian is not bool' @@ -613,7 +618,7 @@ class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase): return self.name def get_obj (self): - return CTRexVmInsWrMaskFlowVar(self.name,self.pkt_offset+self.offset_fixup,self.pkt_cast_size,self.mask,self.shift,self.is_big) + return CTRexVmInsWrMaskFlowVar(self.name,self.pkt_offset+self.offset_fixup,self.pkt_cast_size,self.mask,self.shift,self.add_value,self.is_big) def compile(self,parent): if type(self.pkt_offset)==str: diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py index 127d1669..fdd330a5 100644 --- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py +++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py @@ -152,6 +152,7 @@ class STLStream(object): next = None, stream_id = None, action_count = 0, + random_seed =0, mac_src_override_by_pkt=None, mac_dst_override_mode=None #see STLStreamDstMAC_xx ): @@ -163,6 +164,7 @@ class STLStream(object): validate_type('self_start', self_start, bool) validate_type('isg', isg, (int, float)) validate_type('stream_id', stream_id, (NoneType, int)) + validate_type('random_seed',random_seed,int); if (type(mode) == STLTXCont) and (next != None): raise STLError("continuous stream cannot have a next stream ID") @@ -207,6 +209,9 @@ class STLStream(object): self.fields['self_start'] = self_start self.fields['isg'] = isg + if random_seed !=0 : + self.fields['random_seed'] = random_seed # optional + # mode self.fields['mode'] = mode.to_json() self.mode_desc = str(mode) |