diff options
Diffstat (limited to 'scripts')
| -rw-r--r-- | scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py | 5 | ||||
| -rw-r--r-- | scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py | 13 | ||||
| -rw-r--r-- | scripts/exp/udp_1pkt_mac_mask5.pcap | bin | 0 -> 2304 bytes | |||
| -rw-r--r-- | scripts/stl/udp_1pkt_mac_mask5.py | 35 |
4 files changed, 47 insertions, 6 deletions
diff --git a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py index dbaafd45..c92bc5ac 100644 --- a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py +++ b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py @@ -183,13 +183,14 @@ class CStlBasic_Test(functional_general_test.CGeneralFunctional_Test): ["udp_1pkt_mac_mask2.py","-m 1 -l 20 ",True], ["udp_1pkt_mac_mask3.py","-m 1 -l 20 ",True], ["udp_1pkt_simple_test2.py","-m 1 -l 10 ",True], # test split of packet with ip option - ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True] + ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True], + ["udp_1pkt_mac_mask5.py","-m 1 -l 30 ",True] ]; - p1 = [ ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True] ] + p1 = [ ["udp_1pkt_mac_mask5.py","-m 1 -l 30 ",True] ] for obj in p: diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py index 713769b6..e27563eb 100644 --- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py +++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py @@ -246,7 +246,7 @@ class CTRexVmInsWrFlowVar(CTRexVmInsBase): assert type(is_big_endian)==bool, 'type of is_big_endian is not bool' class CTRexVmInsWrMaskFlowVar(CTRexVmInsBase): - def __init__(self, fv_name, pkt_offset,pkt_cast_size,mask,shift, is_big_endian=True): + def __init__(self, fv_name, pkt_offset,pkt_cast_size,mask,shift,add_value, is_big_endian=True): super(CTRexVmInsWrMaskFlowVar, self).__init__("write_mask_flow_var") self.name = fv_name assert type(fv_name)==str, 'type of fv_name is not str' @@ -258,6 +258,8 @@ class CTRexVmInsWrMaskFlowVar(CTRexVmInsBase): assert type(mask)==int, 'type of mask is not int' self.shift = shift assert type(shift)==int, 'type of shift is not int' + self.add_value =add_value + assert type(add_value)==int, 'type of add_value is not int' self.is_big_endian = is_big_endian assert type(is_big_endian)==bool, 'type of is_big_endian is not bool' @@ -590,7 +592,7 @@ class CTRexVmDescWrFlowVar(CTRexVmDescBase): self.pkt_offset = t[0] class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase): - def __init__(self, fv_name, pkt_offset, pkt_cast_size=1, mask=0xff, shift=0, offset_fixup=0, is_big=True): + def __init__(self, fv_name, pkt_offset, pkt_cast_size=1, mask=0xff, shift=0, add_value=0, offset_fixup=0, is_big=True): super(CTRexVmDescWrMaskFlowVar, self).__init__() self.name =fv_name assert type(fv_name)==str, 'type of fv_name is not str' @@ -599,13 +601,16 @@ class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase): self.pkt_offset =pkt_offset self.pkt_cast_size =pkt_cast_size assert type(pkt_cast_size)==int,'type of pkt_cast_size is not int' - if not (pkt_cast_size in [1,2,4,8]): + if not (pkt_cast_size in [1,2,4]): raise CTRexPacketBuildException(-10,"not valid cast size"); self.mask = mask assert type(mask)==int,'type of mask is not int' self.shift = shift assert type(shift)==int,'type of shift is not int' + self.add_value = add_value + assert type(add_value)==int,'type of add_value is not int' + self.is_big =is_big; assert type(is_big)==bool,'type of is_big_endian is not bool' @@ -613,7 +618,7 @@ class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase): return self.name def get_obj (self): - return CTRexVmInsWrMaskFlowVar(self.name,self.pkt_offset+self.offset_fixup,self.pkt_cast_size,self.mask,self.shift,self.is_big) + return CTRexVmInsWrMaskFlowVar(self.name,self.pkt_offset+self.offset_fixup,self.pkt_cast_size,self.mask,self.shift,self.add_value,self.is_big) def compile(self,parent): if type(self.pkt_offset)==str: diff --git a/scripts/exp/udp_1pkt_mac_mask5.pcap b/scripts/exp/udp_1pkt_mac_mask5.pcap Binary files differnew file mode 100644 index 00000000..cea46691 --- /dev/null +++ b/scripts/exp/udp_1pkt_mac_mask5.pcap diff --git a/scripts/stl/udp_1pkt_mac_mask5.py b/scripts/stl/udp_1pkt_mac_mask5.py new file mode 100644 index 00000000..07c83897 --- /dev/null +++ b/scripts/stl/udp_1pkt_mac_mask5.py @@ -0,0 +1,35 @@ +from trex_stl_lib.api import * + + +# step is not 1. +class STLS1(object): + + def __init__ (self): + self.fsize =64; # the size of the packet + + def create_stream (self): + + # create a base packet and pad it to size + size = self.fsize - 4; # no FCS + base_pkt = Ether()/IP(src="16.0.0.1",dst="48.0.0.1")/UDP(dport=12,sport=1025) + pad = max(0, size - len(base_pkt)) * 'x' + + vm = CTRexScRaw( [ STLVmFlowVar(name="mac_src", min_value=0, max_value=10, size=2, op="inc",step=1), + STLVmWrMaskFlowVar(fv_name="mac_src", pkt_offset= 10,pkt_cast_size=1, mask=0xff,add_value=5,shift=0) # range is 5-15 + ] + ) + + return STLStream(packet = STLPktBuilder(pkt = base_pkt/pad,vm = vm), + mode = STLTXCont( pps=10 )) + + def get_streams (self, direction = 0): + # create 1 stream + return [ self.create_stream() ] + + +# dynamic load - used for trex console or simulator +def register(): + return STLS1() + + + |