diff options
Diffstat (limited to 'src/dpdk22/drivers/net/i40e/i40e_ethdev.c')
-rw-r--r-- | src/dpdk22/drivers/net/i40e/i40e_ethdev.c | 71 |
1 files changed, 67 insertions, 4 deletions
diff --git a/src/dpdk22/drivers/net/i40e/i40e_ethdev.c b/src/dpdk22/drivers/net/i40e/i40e_ethdev.c index ae195683..623c071c 100644 --- a/src/dpdk22/drivers/net/i40e/i40e_ethdev.c +++ b/src/dpdk22/drivers/net/i40e/i40e_ethdev.c @@ -2145,10 +2145,16 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) pf->main_vsi->eth_stats.rx_multicast + pf->main_vsi->eth_stats.rx_broadcast - pf->main_vsi->eth_stats.rx_discards; - stats->opackets = pf->main_vsi->eth_stats.tx_unicast + - pf->main_vsi->eth_stats.tx_multicast + - pf->main_vsi->eth_stats.tx_broadcast; - stats->ibytes = ns->eth.rx_bytes; + + stats->opackets = ns->eth.tx_unicast +ns->eth.tx_multicast +ns->eth.tx_broadcast; + /*TREX PATCH move to global transmit and not pf->vsi and we have two high and low priorty + pf->main_vsi->eth_stats.tx_unicast + + pf->main_vsi->eth_stats.tx_multicast + + pf->main_vsi->eth_stats.tx_broadcast; + */ + + stats->ibytes = pf->main_vsi->eth_stats.rx_bytes; + stats->obytes = ns->eth.tx_bytes; stats->oerrors = ns->eth.tx_errors + pf->main_vsi->eth_stats.tx_errors; @@ -3868,6 +3874,30 @@ i40e_update_default_filter_setting(struct i40e_vsi *vsi) return i40e_vsi_add_mac(vsi, &filter); } +#ifdef TREX_PATCH +#define LOW_LATENCY_WORKAROUND +#ifdef LOW_LATENCY_WORKAROUND +static int +i40e_vsi_update_tc_max_bw(struct i40e_vsi *vsi, u16 credit){ + struct i40e_hw *hw = I40E_VSI_TO_HW(vsi); + int ret; + + if (!vsi->seid) { + PMD_DRV_LOG(ERR, "seid not valid"); + return -EINVAL; + } + + ret = i40e_aq_config_vsi_bw_limit(hw, vsi->seid, credit,0, NULL); + if (ret != I40E_SUCCESS) { + PMD_DRV_LOG(ERR, "Failed to configure TC BW"); + return ret; + } + return (0); +} +#endif +#endif + + #define I40E_3_BIT_MASK 0x7 /* * i40e_vsi_get_bw_config - Query VSI BW Information @@ -4426,6 +4456,39 @@ i40e_pf_setup(struct i40e_pf *pf) } pf->main_vsi = vsi; + +#ifdef TREX_PATCH +#ifdef LOW_LATENCY_WORKAROUND + /* + Workaround for low latency issue. + It seems RR does not work as expected both from same QSet and from different QSet + Quanta could be very high and this creates very high latency, especially with long packet size (9K) + This is a workaround limit the main (bulk) VSI to 99% of the BW and by that support low latency (suggested by Intel) + ETS with with strict priority and 127 credit does not work . + */ + + if (hw->phy.link_info.link_speed == I40E_LINK_SPEED_10GB) { + i40e_vsi_update_tc_max_bw(vsi,199); + }else{ + if (hw->phy.link_info.link_speed == I40E_LINK_SPEED_40GB) { + i40e_vsi_update_tc_max_bw(vsi,799); + }else{ + PMD_DRV_LOG(ERR, "Unknown phy speed %d",hw->phy.link_info.link_speed); + } + } + + /* add for low latency a new VSI for Queue set */ + vsi = i40e_vsi_setup(pf, I40E_VSI_VMDQ2, vsi, 0); + if (!vsi) { + PMD_DRV_LOG(ERR, "Setup of low latency vsi failed"); + return I40E_ERR_NOT_READY; + } + + pf->ll_vsi = vsi; + +#endif +#endif + /* Configure filter control */ memset(&settings, 0, sizeof(settings)); if (hw->func_caps.rss_table_size == ETH_RSS_RETA_SIZE_128) |