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2016-01-24added support for L1 B/W checkimarom4-19/+45
both start/update now enforce this and it can be bypassed by providing 'force'
2016-01-24fixed issue trex-172: Console -m 100% is L2 and no L1imarom6-48/+84
http://trex-tgn.cisco.com/youtrack/issue/trex-172
2016-01-24Merge from originHanoh Haim10-42/+127
2016-01-2482599 report input errors on drop queue- remove the MPC in this caseHanoh Haim1-3/+7
2016-01-21async publish nowimarom10-42/+127
2016-01-19Fix issue of --learn-mode ignored if --learn-verify was set before it in ↵Ido Barnea1-3/+4
command line
2016-01-19In latency check, do not send responses for requests that were actually droppedIdo Barnea1-3/+5
2016-01-19Adding option to pass NAT info in TCP ACK of first SYNIdo Barnea13-325/+451
2016-01-10add alloc_error, queue_full, queue_drop stats report via ZMQYaroslav Brustinov1-0/+3
regression: update kiwi02 and trex08 benchmarks add common "scripts_dir" variable for usage in tests configure router with proper MTU in jumbo test add --local flag for not connecting to remote server (useful for functional tests)
2016-01-10random packet size - uses expected packet sizeimarom5-26/+82
instead of the value as is
2016-01-07MergeHanoh Haim12-670/+846
2016-01-07basic enic support- still has issuesHanoh Haim1-1/+30
2016-01-07simulation bug - mbuf refincimarom2-5/+13
2016-01-07Added --send-debug-pktIdo Barnea5-605/+559
Moved code from main_dpdk.cpp to new files.
2016-01-07stateless sim dry was "too much" dry - no only I/O is skippedimarom3-14/+43
2016-01-07first bug caught by the simulator - memory leakimarom2-0/+7
2016-01-07yet another stateless simulation phaseimarom5-18/+100
2016-01-07more options to the stateless simulationimarom5-44/+140
2016-01-05Merge branch 'random_pkt'Hanoh Haim14-99/+668
2016-01-05stateful load 9k packetsHanoh Haim1-4/+1
2016-01-059k packet size does not work for VMXNET3Hanoh Haim2-3/+8
2016-01-05random 9k works on 10gb nicsHanoh Haim2-3/+5
2016-01-05stateless sim - core_index and all cores simulationimarom5-46/+117
2016-01-04some additions to the stateless simulation modeimarom6-39/+158
2016-01-04a script to inject simulation stateless filesimarom2-1/+47
2016-01-04simulation end to endimarom18-652/+1162
2016-01-04Fixing 40G stuck input queue issueIdo Barnea1-52/+38
2015-12-29trim packet size command worksHanoh Haim4-6/+24
2015-12-28 fix simulation statsHanoh Haim1-5/+5
2015-12-28maximum packet size support 9k - simulationHanoh Haim11-87/+634
2015-12-28Better error message when user gives too big -c argIdo Barnea1-2/+54
2015-12-27Added README to dpdk dirIdo Barnea1-0/+3
2015-12-27No flow control disabling for 40G.Ido Barnea1-15/+17
Add DPDK version to help string.
2015-12-27Full support dpdk 22.Ido Barnea1-89/+75
2015-12-27Changes only to DPDK files: dpdk22 40G fixes for TTL and ip_protocol match ↵Ido Barnea7-10/+104
and IPv6 support + TX hang issue fix
2015-12-27Adding dpdk 2.2 instead of dpdk 1.8 and making changes to make compilation work.Ido Barnea653-145660/+96435
40G and 10G filters do not work yet.
2015-12-24merge vm random supportHanoh Haim12-276/+867
2015-12-24 add refresh option to stream - should be enabled by stream bitHanoh Haim2-0/+21
2015-12-24improve multi-core random VM supportHanoh Haim6-26/+237
2015-12-24fix display of huge positive number of drops (due to casting from negative ↵Yaroslav Brustinov1-2/+9
to unsinged)
2015-12-23connected control plane to splitimarom5-59/+121
2015-12-23support for client var splitimarom7-37/+144
2015-12-23VM wrap around issueimarom1-32/+40
2015-12-23some fixes to the VM and the splitterimarom4-78/+172
2015-12-23support for VM split - 1st phaseimarom11-201/+517
2015-12-21CRASH: uninit var at stateless port objectimarom1-0/+2
2015-12-21latency.cpp: update ports stats at CLatencyManager::update, instead of ↵Yaroslav Brustinov1-1/+5
CCPortLatency::DumpShort Python API added: * is_idle(): determine if TRex is in idle state * sample_x_seconds(): sample TRex for given number of seconds, useful for changing device (router etc.) config afterwards.
2015-12-16add tuple gen command and yaml exampleHanoh Haim3-2/+32
2015-12-15Merging lastest 'master' to side branch 'vm'imarom7-5/+24
Conflicts: scripts/automation/trex_control_plane/console/trex_console.py
2015-12-15VM: connected control plane to DPimarom12-92/+118