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| author |   Vratko Polak <vrpolak@cisco.com> | 2020-10-29 13:23:29 +0000 |
|---|---|---|
| committer |   Gerrit Code Review <gerrit@fd.io> | 2020-10-29 13:23:29 +0000 |
| commit | f188fc8c1bb12e0a116cba0fa837561080177680 (patch) | |
| tree | 32b276faa34aaaeba4ec4d9d2b3864c8dd0bd7df /jjb/csit/csit.yaml | |
| parent | 97963740c8f3ae0b5b17fc15a53b2b8c86c7df1f (diff) | |
| parent | b1512a2fc42b0104e19f506f50c96c7aab9e4f08 (diff) | |
Merge "Set the daily mrr jobs cadence to normal"
Diffstat (limited to 'jjb/csit/csit.yaml')
| -rw-r--r-- | jjb/csit/csit.yaml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/jjb/csit/csit.yaml b/jjb/csit/csit.yaml index d3eb53ae6..a762e316c 100644 --- a/jjb/csit/csit.yaml +++ b/jjb/csit/csit.yaml @@ -237,7 +237,7 @@ build-timeout: '{build-timeout}' triggers: - - timed: '0 14 * * 1,3,5' + - timed: '0 2,14 * * *' builders: - maven-target: |