Misc bug fixes

*IP assignment
*Node is a key attribute
*Up-to-date packages
*Trailing whitespaces
...

Change-Id: Id8e2a5f7b2c4506f326b3c4bc991fa65f53fca5c
Signed-off-by: Marcel Enguehard <mengueha+fdio@cisco.com>

1 files changed, 3 insertions, 3 deletions

diff --git a/vicn/core/scheduling_algebra.py b/vicn/core/scheduling_algebra.py
index 207856c0..368ac243 100644
--- a/vicn/core/scheduling_algebra.py
+++ b/vicn/core/scheduling_algebra.py
@@ -16,19 +16,19 @@
 # limitations under the License.
 #
 
-def SchedulingAlgebra(cls, concurrent_mixin=object, composition_mixin=object, 
+def SchedulingAlgebra(cls, concurrent_mixin=object, composition_mixin=object,
         sequential_mixin=object): # allow_none = True
 
     class BaseElement(cls):
         def __default__(cls, *elements):
-            elts = [e for e in elements 
+            elts = [e for e in elements
                 if e is not None and not isinstance(e, Empty)]
             if len(elts) == 0:
                 # The first is always Empty
                 assert len(elements) != 0
                 return elements[0]
             elif len(elts) == 1:
-                return elts[0] 
+                return elts[0]
             return cls(*elts)
 
         def __concurrent__(*elements):