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authorjuraj.linkes <juraj.linkes@pantheon.tech>2020-03-04 12:49:34 +0100
committerjuraj.linkes <juraj.linkes@pantheon.tech>2020-03-04 14:06:17 +0100
commit05d56b17a7382c88bca44b35625e6ebf21ca588b (patch)
treeee4667babed4a79979c38c87a03b976322d4612e
parentfd64535ad8164fc1d9720863a1b49528e9744a05 (diff)
Add all ports from 3n-tsh tg to topofile
Without it, we're running the risk of unused port being bound to linux kernel driver when t-rex starts, preventing it from starting. Change-Id: I3a1702e364c06809b527830bf9addacd63fb47ee Signed-off-by: juraj.linkes <juraj.linkes@pantheon.tech>
Diffstat
-rw-r--r--topologies/available/lf_3n_tsh_testbed33.yaml14
1 files changed, 13 insertions, 1 deletions
diff --git a/topologies/available/lf_3n_tsh_testbed33.yaml b/topologies/available/lf_3n_tsh_testbed33.yaml
index ec9d1d96a4..8a8077cafb 100644
--- a/topologies/available/lf_3n_tsh_testbed33.yaml
+++ b/topologies/available/lf_3n_tsh_testbed33.yaml
@@ -1,4 +1,4 @@
-# Copyright (c) 2019 PANTHEON.tech and/or its affiliates.
+# Copyright (c) 2020 PANTHEON.tech and/or its affiliates.
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at:
@@ -41,6 +41,18 @@ nodes:
link: link1
driver: i40e
model: Intel-X710
+ port2:
+ mac_address: "3c:fd:fe:a8:aa:c2"
+ pci_address: "0000:18:00.2"
+ link: link10
+ driver: i40e
+ model: Intel-X710
+ port3:
+ mac_address: "3c:fd:fe:a8:aa:c3"
+ pci_address: "0000:18:00.3"
+ link: link11
+ driver: i40e
+ model: Intel-X710
DUT1:
type: DUT
host: 10.30.51.36
iteral.Number.Integer.Long */ } 
/*
 * Copyright (c) 2016 Cisco and/or its affiliates.
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at:
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include <vppinfra/ptclosure.h>

u8 **
clib_ptclosure_alloc (int n)
{
  u8 **rv = 0;
  u8 *row;
  int i;

  ASSERT (n > 0);

  vec_validate (rv, n - 1);
  for (i = 0; i < n; i++)
    {
      row = 0;
      vec_validate (row, n - 1);

      rv[i] = row;
    }
  return rv;
}

void
clib_ptclosure_free (u8 ** ptc)
{
  u8 *row;
  int n = vec_len (ptc);
  int i;

  ASSERT (n > 0);

  for (i = 0; i < n; i++)
    {
      row = ptc[i];
      vec_free (row);
    }
  vec_free (ptc);
}

void
clib_ptclosure_copy (u8 ** dst, u8 ** src)
{
  int i, n;
  u8 *src_row, *dst_row;

  n = vec_len (dst);

  for (i = 0; i < vec_len (dst); i++)
    {
      src_row = src[i];
      dst_row = dst[i];
      clib_memcpy (dst_row, src_row, n);
    }
}

/*
 * compute the positive transitive closure
 * of a relation via Warshall's algorithm.
 *
 * Ref:
 * Warshall, Stephen (January 1962). "A theorem on Boolean matrices".
 * Journal of the ACM 9 (1): 11–12.
 *
 * foo[i][j] = 1 means that item i
 * "bears the relation" to item j.
 *
 * For example: "item i must be before item j"
 *
 * You could use a bitmap, but since the algorithm is
 * O(n**3) in the first place, large N is inadvisable...
 *
 */

u8 **
clib_ptclosure (u8 ** orig)
{
  int i, j, k;
  int n;
  u8 **prev, **cur;

  n = vec_len (orig);
  prev = clib_ptclosure_alloc (n);
  cur = clib_ptclosure_alloc (n);

  clib_ptclosure_copy (prev, orig);

  for (k = 0; k < n; k++)
    {
      for (i = 0; i < n; i++)
	{
	  for (j = 0; j < n; j++)
	    {
	      cur[i][j] = prev[i][j] || (prev[i][k] && prev[k][j]);
	    }
	}
      clib_ptclosure_copy (prev, cur);
    }
  clib_ptclosure_free (prev);
  return cur;
}



/*
 * fd.io coding-style-patch-verification: ON
 *
 * Local Variables:
 * eval: (c-set-style "gnu")
 * End:
 */