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author | Maciek Konstantynowicz <mkonstan@cisco.com> | 2021-08-03 19:41:25 +0100 |
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committer | Tibor Frank <tifrank@cisco.com> | 2021-08-04 12:08:53 +0000 |
commit | a41a88443e4c1e4783936006fe58eb8e733c6957 (patch) | |
tree | fc40fbafed3ac06f8156ef114c08a4fe65b8de92 | |
parent | 6fdf1c2829225150b4e27bc0066631965b2baec4 (diff) |
report: update vpp rls notes with trex latency measurement issue for FVL NICs
Change-Id: Ia6de51914f7d31194796538cdd81183c7a16e1d7
Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
(cherry picked from commit b3734284f7cdf49cb04b142c00087c10369a48e7)
-rw-r--r-- | docs/report/vpp_performance_tests/csit_release_notes.rst | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/csit_release_notes.rst b/docs/report/vpp_performance_tests/csit_release_notes.rst index 72fd0a1b61..f4e5f25d4c 100644 --- a/docs/report/vpp_performance_tests/csit_release_notes.rst +++ b/docs/report/vpp_performance_tests/csit_release_notes.rst @@ -65,6 +65,13 @@ Changes in |csit-release| to Ubuntu 20.04.2 LTS. Upgrade included also baseline Docker containers used for spawning topology. + - **TRex upgrade v2.86 to v2.88**: Included move to DPDK 21.02 and + changed the way egress low latency queues are used in FVL NICs. + This broke latency measurements for majority of FVL NICs in + CSIT. Latency values look better after upgrading FVL FW on TRex + servers, but still somewhat higher than before the TRex upgrade. + Tracked by `CSIT-1790 <https://jira.fd.io/browse/CSIT-1790>`_. + - **CSIT test environment** version has been updated to ver. 7, see :ref:`test_environment_versioning`. @@ -113,7 +120,9 @@ List of known issues in |csit-release| for VPP performance tests: | 4 | `CSIT-1789 | AVF driver does not perform RSS in a deterministic way. | | | <https://jira.fd.io/browse/CSIT-1789>`_ | This increases standard deviation of tests with small number of flows (mainly ipsec). | +----+-----------------------------------------+-----------------------------------------------------------------------------------------------------------+ - +| 5 | `CSIT-1790 | Broken TRex latency measurements with TRex v2.88, DPDK 21.02 and FVL FW 6.01. | +| | <https://jira.fd.io/browse/CSIT-1790>`_ | High latency O(5msec) for all VPP and testpmd/l3fwd test cases for FVL NICs with FW 6.01. | ++----+-----------------------------------------+-----------------------------------------------------------------------------------------------------------+ Root Cause Analysis for Performance Changes ------------------------------------------- |