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author | 2020-03-27 14:31:12 +0000 | |
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committer | 2020-04-01 06:33:09 +0000 | |
commit | 10d2a085292d42716dacac36c973cbbf8bcfaeb0 (patch) | |
tree | 4da92b25d63d82424bcfed8f5a40a64fe85abd2f /DPDK_VPP_VER | |
parent | 51b70fc47a2aeb40e26c1b620ccc89af2762b0c9 (diff) |
FIX: irqbalance settings
By default irqbalance should be honoring isolcpu settings but as of
latest finding IRQs are distributed ad-hoc even if irqbalance is:
- enabled: with default settings
- disabled: by configuration
- disabled: as a service
- enabled: with incorrect mask
This patch brings explicit configuration of IRQBALANCE_BANNED_CPUS with
mask large enough to cover all cores and keeps IRQ to be processed by
core 0.
Signed-off-by: Peter Mikus <pmikus@cisco.com>
Change-Id: I0eb36d780feb284a5493e123acbf993a362ea9ec
Diffstat (limited to 'DPDK_VPP_VER')
0 files changed, 0 insertions, 0 deletions