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| author |   Vratko Polak <vrpolak@cisco.com> | 2018-05-28 11:53:45 +0200 |
|---|---|---|
| committer | Vratko Polak <vrpolak@cisco.com> | 2018-06-18 12:20:18 +0200 |
| commit | a9f251c649a5dea7428a43dc24380077a72dacba (patch) | |
| tree | e56e2cae2970968efe5f5ca285feb9f3b8ce2bbc /VIRL_RELEASE_CENTOS | |
| parent | 938a0c9cec6d2177e098653ad398372fb482c36f (diff) | |
CSIT-986: Implement proposed MDR improvements
+ Use first intermediate with goal in initial phase.
+ Measure above MRR if that got zero loss.
+ Always prioritizes NDR in internal search.
+ Rename classes.
+ Copy code for standalone PyPI publishing.
- Original files will be deleted after publish.
Change-Id: I5169d602d1e5e35a1894645cd52e70d791871608
Signed-off-by: Vratko Polak <vrpolak@cisco.com>
Diffstat (limited to 'VIRL_RELEASE_CENTOS')
0 files changed, 0 insertions, 0 deletions