diff options
| author |   Peter Mikus <pmikus@cisco.com> | 2020-02-17 08:42:16 +0000 |
|---|---|---|
| committer | Peter Mikus <pmikus@cisco.com> | 2020-02-17 08:47:47 +0000 |
| commit | c8c28c8589091e8a65d3c60e17dfeb6e4c99c302 (patch) | |
| tree | 10ace5ce20f2a7fc140152b0435f639e23c4dba2 /docs/lab/testbeds_sm_clx_hw_bios_cfg.md | |
| parent | e8db3444e0025cb1d34952f4064ae391f94dd327 (diff) | |
Fix: Ansible minor bugs
Signed-off-by: Peter Mikus <pmikus@cisco.com>
Change-Id: I804e78c3b8586dc9e9ca8b7cf4bf97d3744aeedc
Diffstat (limited to 'docs/lab/testbeds_sm_clx_hw_bios_cfg.md')
| -rw-r--r-- | docs/lab/testbeds_sm_clx_hw_bios_cfg.md | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/docs/lab/testbeds_sm_clx_hw_bios_cfg.md b/docs/lab/testbeds_sm_clx_hw_bios_cfg.md index 30146cda81..1c0848fe21 100644 --- a/docs/lab/testbeds_sm_clx_hw_bios_cfg.md +++ b/docs/lab/testbeds_sm_clx_hw_bios_cfg.md @@ -1121,11 +1121,11 @@ pku ospke avx512_vnni md_clear flush_l1d arch_capabilities ``` Host. IPMI IP. BIOS. CPLD. CPU Microcode. PCI Bus. X710 Firmware. XXV710 Firmware. i40e. -s32-t14-sut1. 10.30.55.17. 3.0c. 03.B1.05. 05000021. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. -s33-t27-sut1. 10.30.55.18. 3.0c. 03.B1.05. 05000021. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. -s34-t27-tg1. 10.30.55.19. 3.0c. 03.B1.05. 05000021. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. -s35-t28-sut1. 10.30.55.20. 3.0c. 03.B1.05. 05000021. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. -s36-t28-tg1. 10.30.55.21. 3.0c. 03.B1.05. 05000021. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. -s37-t29-sut1. 10.30.55.22. 3.0c. 03.B1.05. 05000021. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. -s38-t29-tg1. 10.30.55.23. 3.0c. 03.B1.05. 05000021. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. +s32-t14-sut1. 10.30.55.17. 3.2. 03.B1.05. 0500002C. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. +s33-t27-sut1. 10.30.55.18. 3.2. 03.B1.05. 0500002C. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. +s34-t27-tg1. 10.30.55.19. 3.2. 03.B1.05. 0500002C. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. +s35-t28-sut1. 10.30.55.20. 3.2. 03.B1.05. 0500002C. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. +s36-t28-tg1. 10.30.55.21. 3.2. 03.B1.05. 0500002C. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. +s37-t29-sut1. 10.30.55.22. 3.2. 03.B1.05. 0500002C. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. +s38-t29-tg1. 10.30.55.23. 3.2. 03.B1.05. 0500002C. A5.01.18. 6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k. ``` |