diff options
| author |   Peter Mikus <pmikus@cisco.com> | 2022-01-20 10:13:26 +0100 |
|---|---|---|
| committer | Peter Mikus <pmikus@cisco.com> | 2022-01-20 09:40:11 +0000 |
| commit | f16d4b88517fd3dd592c7a0c178109e64996b409 (patch) | |
| tree | b127019bbe3ed2da6bf32cea075c6ff2512ac698 /docs/lab/testbeds_sm_clx_hw_bios_cfg.md | |
| parent | 10a11cf2789cecb14fa6a150c0888552db6ef2eb (diff) | |
feat(ansible): Compatibility matrix bump
Signed-off-by: Peter Mikus <pmikus@cisco.com>
Change-Id: I9628089bae7d9690f75807beb4321eadf84f9c79
(cherry picked from commit e310defb66f8b66ebd505c3e04c62ae57f8fe447)
Diffstat (limited to 'docs/lab/testbeds_sm_clx_hw_bios_cfg.md')
| -rw-r--r-- | docs/lab/testbeds_sm_clx_hw_bios_cfg.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/docs/lab/testbeds_sm_clx_hw_bios_cfg.md b/docs/lab/testbeds_sm_clx_hw_bios_cfg.md index 08937f3b5c..822aac4afb 100644 --- a/docs/lab/testbeds_sm_clx_hw_bios_cfg.md +++ b/docs/lab/testbeds_sm_clx_hw_bios_cfg.md @@ -1443,10 +1443,10 @@ pku ospke avx512_vnni md_clear flush_l1d arch_capabilities ``` Host. IPMI IP. BMC. BIOS. CPLD. CPU Microcode. PCI Bus. X710 Firmware. XXV710 Firmware. i40e. MLX5 Firmware. mlx5_core E810 Firmware. ice. -s33-t27-sut1. 10.30.55.18. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.30 0x8000a49d 1.2926.0. 8.30 0x8000a485 1.2926.0. 2.15.9. 16.29.1016. 5.2-1.0.4. 3.00 0x80008256 1.2992.0. 1.6.4. +s33-t27-sut1. 10.30.55.18. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.30 0x8000a49d 1.2926.0. 8.30 0x8000a485 1.2926.0. 2.17.4. 16.29.1016. 5.2-1.0.4. 3.10 0x8000ad67 1.3106.0. 1.7.16. s34-t27-tg1. 10.30.55.19. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.00 0x80008b82 1.2007.0. 8.00 0x80008c1a 1.2007.0. 2.14.13. 16.29.1016. 5.2-1.0.4. 2.40 0x80007062 1.2898.0. 1.6.4. -s35-t28-sut1. 10.30.55.20. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.30 0x8000a49d 1.2926.0. 8.30 0x8000a485 1.2926.0. 2.15.9. 16.29.1016. 5.2-1.0.4. 3.00 0x80008256 1.2992.0. 1.6.4. +s35-t28-sut1. 10.30.55.20. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.30 0x8000a49d 1.2926.0. 8.30 0x8000a485 1.2926.0. 2.17.4. 16.29.1016. 5.2-1.0.4. 3.10 0x8000ad67 1.3106.0. 1.7.16. s36-t28-tg1. 10.30.55.21. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.00 0x80008b82 1.2007.0. 8.00 0x80008c1a 1.2007.0. 2.14.13. 16.29.1016. 5.2-1.0.4. 2.40 0x80007062 1.2898.0. 1.6.4. -s37-t29-sut1. 10.30.55.22. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.30 0x8000a49d 1.2926.0. 8.30 0x8000a485 1.2926.0. 2.15.9. 16.29.1016. 5.2-1.0.4. 3.00 0x80008256 1.2992.0. 1.6.4. +s37-t29-sut1. 10.30.55.22. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.30 0x8000a49d 1.2926.0. 8.30 0x8000a485 1.2926.0. 2.17.4. 16.29.1016. 5.2-1.0.4. 3.10 0x8000ad67 1.3106.0. 1.7.16. s38-t29-tg1. 10.30.55.23. 1.67. 3.2. 03.B1.05. 0500002C. A5.01.18. 8.00 0x80008b82 1.2007.0. 8.00 0x80008c1a 1.2007.0. 2.14.13. 16.29.1016. 5.2-1.0.4. 2.40 0x80007062 1.2898.0. 1.6.4. ``` |