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author | Tibor Frank <tifrank@cisco.com> | 2018-11-05 15:01:37 +0100 |
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committer | Tibor Frank <tifrank@cisco.com> | 2018-11-05 14:04:50 +0000 |
commit | e9ba5d06fd330ea6e4946563abef5aecfa003bbf (patch) | |
tree | b3d796e268cb975264e6d5594d6de8d5bc8cf112 /docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst | |
parent | 7507c5252ba2b20e89b8f2ff30321f313894f7ce (diff) |
CSIT-1342: Edit the static content for CSIT-1810 report
Change-Id: I44abd4ad646813cc70e9fa2b46b51ee7613dc501
Signed-off-by: Tibor Frank <tifrank@cisco.com>
(cherry picked from commit b641b5bf12a0d1b63ac9afb7c89133297d3b63fe)
(cherry picked from commit 946813cd0d3982a81e55f12842e17361b353876a)
Diffstat (limited to 'docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst')
-rw-r--r-- | docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst b/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst index 9dd2add5aa..8f5b807240 100644 --- a/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst +++ b/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst @@ -39,6 +39,10 @@ a.k.a. L3FWD data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in `CSIT git repository <https://git.fd.io/csit/tree/tests/dpdk/perf?h=rls1810>`_. +.. raw:: latex + + \clearpage + 3n-hsw-x520 ~~~~~~~~~~~ |