diff options
| author |   Tibor Frank <tifrank@cisco.com> | 2019-02-11 12:28:21 +0100 |
|---|---|---|
| committer | Tibor Frank <tifrank@cisco.com> | 2019-02-11 15:08:48 +0100 |
| commit | 53310a9c512daecbe20a45eb48f5167ea5a6a8b2 (patch) | |
| tree | e1c9efd8d0016fa4d42c0d5dd597593cf11a40e3 /docs/report/dpdk_performance_tests/packet_throughput_graphs | |
| parent | adab3cb4d5abc7f555f40b5f268fb611a77cace5 (diff) | |
Report: Remove index
Change-Id: I477711ef75e07db26e36b3567883f9a7feb45a09
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/dpdk_performance_tests/packet_throughput_graphs')
| -rw-r--r-- | docs/report/dpdk_performance_tests/packet_throughput_graphs/ip4.rst | 2 | ||||
| -rw-r--r-- | docs/report/dpdk_performance_tests/packet_throughput_graphs/l2.rst | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/docs/report/dpdk_performance_tests/packet_throughput_graphs/ip4.rst b/docs/report/dpdk_performance_tests/packet_throughput_graphs/ip4.rst index b3c944c6d9..37fcc3a447 100644 --- a/docs/report/dpdk_performance_tests/packet_throughput_graphs/ip4.rst +++ b/docs/report/dpdk_performance_tests/packet_throughput_graphs/ip4.rst @@ -38,7 +38,7 @@ running in multiple configurations of L3FWD pmd thread(s), a.k.a. L3FWD data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/dpdk/perf?h=rls1810>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/dpdk/perf?h=rls1901>`_. .. raw:: latex diff --git a/docs/report/dpdk_performance_tests/packet_throughput_graphs/l2.rst b/docs/report/dpdk_performance_tests/packet_throughput_graphs/l2.rst index 143b864e8f..6aefc362eb 100644 --- a/docs/report/dpdk_performance_tests/packet_throughput_graphs/l2.rst +++ b/docs/report/dpdk_performance_tests/packet_throughput_graphs/l2.rst @@ -34,7 +34,7 @@ running in multiple configurations of Testpmd pmd thread(s), a.k.a. Testpmd data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/dpdk/perf?h=rls1810>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/dpdk/perf?h=rls1901>`_. .. raw:: latex |