diff options
author | Tibor Frank <tifrank@cisco.com> | 2020-01-22 15:27:29 +0100 |
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committer | Tibor Frank <tifrank@cisco.com> | 2020-01-23 09:35:42 +0100 |
commit | 25a8fe0aa594ca010b7f1aad449a2af2b6625bd7 (patch) | |
tree | 9a53afbae053e1cf0f77f7a78819e4edffd28fd2 /docs/report/introduction/physical_testbeds.rst | |
parent | 774d8a344d8c2610199aea5758e81b29535fc1f8 (diff) |
Report: Add diagrams for testbeds
- Diagrams for testbeds:
- 3n-dnv
- 3n-tsh
- 2n-clx
- Replace s/Cascadelake/Cascade Lake
Change-Id: I77e7659a0aba4766a28577f940b7e44e60cbd82d
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/introduction/physical_testbeds.rst')
-rw-r--r-- | docs/report/introduction/physical_testbeds.rst | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst index 8860638d43..159728d8ee 100644 --- a/docs/report/introduction/physical_testbeds.rst +++ b/docs/report/introduction/physical_testbeds.rst @@ -27,7 +27,7 @@ Current FD.io production testbeds are built with SUT servers based on the following processor architectures: - Intel Xeon: Skylake Platinum 8180, Haswell-SP E5-2699v3, - Cascadelake Platinum 8280, Cascadelake 6252N. + Cascade Lake Platinum 8280, Cascade Lake 6252N. - Intel Atom: Denverton C3858. - ARM: TaiShan 2280, hip07-d05. @@ -41,13 +41,13 @@ https://git.fd.io/csit/tree/docs/lab/testbed_specifications.md. Following is the description of existing production testbeds. -2-Node Xeon Cascadelake (2n-clx) --------------------------------- +2-Node Xeon Cascade Lake (2n-clx) +--------------------------------- Three 2n-clx testbeds are in operation in FD.io labs. Each 2n-clx testbed is built with two SuperMicro SYS-7049GP-TRT servers, SUTs are equipped with two Intel Xeon Gold 6252N processors (35.75 MB Cache, 2.30 GHz, 24 cores). -TGs are equiped with Intel Xeon Cascadelake Platinum 8280 processors (38.5 MB +TGs are equiped with Intel Xeon Cascade Lake Platinum 8280 processors (38.5 MB Cache, 2.70 GHz, 28 cores). 2n-clx physical topology is shown below. .. only:: latex @@ -86,7 +86,7 @@ NIC models: #. NIC-5: empty, future expansion. #. NIC-6: x710-DA4 4p10GE Intel. (For self-tests.) -All Intel Xeon Cascadelake servers run with Intel Hyper-Threading enabled, +All Intel Xeon Cascade Lake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. 2-Node Xeon Skylake (2n-skx) |