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| author |   Tibor Frank <tifrank@cisco.com> | 2021-11-23 14:39:30 +0100 |
|---|---|---|
| committer | Tibor Frank <tifrank@cisco.com> | 2021-11-23 14:39:30 +0100 |
| commit | a643037b2b093f3a330e460da15d5dd2edfafa95 (patch) | |
| tree | 92a63b30f806161c13eddf65bfc390bf8a3ec685 /docs/report/introduction/physical_testbeds.rst | |
| parent | b8f989afcced3d43c62eab9e81c5ad70db6e6d54 (diff) | |
Report: Small fixes in static content
Change-Id: I291e83e4f8e4d9798b2868425b7a1fb6b63d8639
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/introduction/physical_testbeds.rst')
| -rw-r--r-- | docs/report/introduction/physical_testbeds.rst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst index 60b06e68dc..be0c393409 100644 --- a/docs/report/introduction/physical_testbeds.rst +++ b/docs/report/introduction/physical_testbeds.rst @@ -121,7 +121,7 @@ All AMD EPYC Zen2 7532 servers run with AMD SMT enabled, doubling the number of logical cores exposed to Linux. 2-Node Xeon Cascadelake (2n-clx) ---------------------------------- +-------------------------------- Three 2n-clx testbeds are in operation in FD.io labs. Each 2n-clx testbed is built with two SuperMicro SYS-7049GP-TRT servers, SUTs are equipped with two @@ -445,7 +445,7 @@ TG NICs: #. NIC-3: xl710-QDA2 2p40GE Intel. 2-Node ARM ThunderX2 (2n-tx2) ---------------------------- +----------------------------- One 2n-tx2 testbed is built with: i) one SuperMicro SYS-7049GP-TRT server acting as TG and equipped with two Intel Xeon Skylake Platinum |