aboutsummaryrefslogtreecommitdiffstats
path: root/docs/report/introduction/test_environment_intro.rst
diff options
context:
space:
mode:
authorpmikus <pmikus@cisco.com>2021-06-15 07:57:50 +0000
committerPeter Mikus <pmikus@cisco.com>2021-06-15 08:05:28 +0000
commit2072a56eeca53f00cff1b5d888d24f7271ae1fb4 (patch)
treed59dece088a4b6a31245e6d73230da487bc55935 /docs/report/introduction/test_environment_intro.rst
parent6726e389d87ebd601a4f4d083833c9f04f573d75 (diff)
Report: Update Infra sections
Signed-off-by: pmikus <pmikus@cisco.com> Change-Id: I14aa6f64b2621ad306e1cd79fafefe94dd1ed85a
Diffstat (limited to 'docs/report/introduction/test_environment_intro.rst')
-rw-r--r--docs/report/introduction/test_environment_intro.rst15
1 files changed, 12 insertions, 3 deletions
diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst
index 2aa4f44e40..c1ab7ea6ad 100644
--- a/docs/report/introduction/test_environment_intro.rst
+++ b/docs/report/introduction/test_environment_intro.rst
@@ -79,7 +79,17 @@ Following is the list of CSIT versions to date:
- The main change is TRex version upgrade:
`increase from 2.82 to 2.86 <https://gerrit.fd.io/r/c/csit/+/29980>`_.
+- Ver. 7 associated with CSIT rls2106 branch (`HW
+ <https://git.fd.io/csit/tree/docs/lab?h=rls2106>`_, `Linux
+ <https://docs.fd.io/csit/rls2106/report/vpp_performance_tests/test_environment.html#sut-settings-linux>`_,
+ `TRex
+ <https://docs.fd.io/csit/rls2106/report/vpp_performance_tests/test_environment.html#tg-settings-trex>`_,
+ `CSIT <https://git.fd.io/csit/tree/?h=rls2106>`_).
+ - TRex version upgrade:
+ `increase from 2.86 to 2.88 <https://gerrit.fd.io/r/c/csit/+/31652>`_.
+ - Ubuntu upgrade:
+ `upgrade from 18.04 LTS to 20.04.2 LTS <https://gerrit.fd.io/r/c/csit/+/31290>`_.
To identify performance changes due to VPP code development between previous
and current VPP release version, both have been tested in CSIT environment of
@@ -101,7 +111,7 @@ topology types are used:
server as TG both connected in ring topology.
Tested SUT servers are based on a range of processors including Intel
-Xeon Haswell-SP, Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm,
+Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm,
Intel Atom. More detailed description is provided in
:ref:`tested_physical_topologies`. Tested logical topologies are
described in :ref:`tested_logical_topologies`.
@@ -112,5 +122,4 @@ Server Specifications
Complete technical specifications of compute servers used in CSIT
physical testbeds are maintained in FD.io CSIT repository:
`FD.io CSIT testbeds - Xeon Cascade Lake`_,
-`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_ and
-`FD.io CSIT Testbeds - Xeon Haswell`_.
+`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_. \ No newline at end of file