Report: add 2n-tx2 static content

Change-Id: I476ac52d64999f6d3ca3ee726f018f36693ac921
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>

3 files changed, 206 insertions, 1 deletions

diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst
index 1c6bc1c267..3412e94c05 100644
--- a/docs/report/introduction/physical_testbeds.rst
+++ b/docs/report/introduction/physical_testbeds.rst
@@ -386,8 +386,47 @@ SUT1 and SUT2 servers are populated with the following NIC models:
 #. NIC-1: connectx4 2p25GE Mellanox.
 #. NIC-2: x520 2p10GE Intel.
 
-TG servers run T-Rex application and are populated with the following
+TG server runs T-Rex application and is populated with the following
+NIC models:
+
+#. NIC-1: x710-DA4 4p10GE Intel.
+#. NIC-2: xxv710-DA2 2p25GE Intel.
+#. NIC-3: xl710-QDA2 2p40GE Intel.
+
+2-Node ARM ThunderX2 (2n-tx2)
+---------------------------
+
+One 2n-tx2 testbed is built with: i) one SuperMicro SYS-7049GP-TRT
+server acting as TG and equipped with two Intel Xeon Skylake Platinum
+8180 processors (38.5 MB Cache, 2.50 GHz, 28 cores), and ii) one Marvell
+ThnderX2 9975 (28* ThunderX2) server acting as SUT and equipped with two
+ThunderX2 ARMv8 CN9975 processors. 2n-tx2 physical topology is shown below.
+
+.. only:: latex
+
+    .. raw:: latex
+
+        \begin{figure}[H]
+            \centering
+                \graphicspath{{../_tmp/src/introduction/}}
+                \includegraphics[width=0.90\textwidth]{testbed-2n-tx2}
+                \label{fig:testbed-2n-tx2}
+        \end{figure}
+
+.. only:: html
+
+    .. figure:: testbed-2n-tx2.svg
+        :alt: testbed-2n-tx2
+        :align: center
+
+SUT server is populated with the following NIC models:
+
+#. NIC-1: xl710-QDA2 2p40GE Intel.
+#. NIC-2: xl710-QDA2 2p40GE Intel.
+
+TG server run T-Rex application and is populated with the following
 NIC models:
 
 #. NIC-1: x710-DA4 4p10GE Intel.
 #. NIC-2: xxv710-DA2 2p25GE Intel.
+#. NIC-3: xl710-QDA2 2p40GE Intel.
diff --git a/docs/report/introduction/test_environment_sut_calib_tx2.rst b/docs/report/introduction/test_environment_sut_calib_tx2.rst
new file mode 100644
index 0000000000..4b715c86f0
--- /dev/null
+++ b/docs/report/introduction/test_environment_sut_calib_tx2.rst
@@ -0,0 +1,25 @@
+ThunderX2
+~~~~~~~~~
+
+Following sections include sample calibration data measured on
+s27-t34-sut1 server running in one of the ThunderX2 testbeds.
+
+
+Linux cmdline
+^^^^^^^^^^^^^
+
+::
+
+    $ cat /proc/cmdline
+    BOOT_IMAGE=/boot/vmlinuz-4.15.0-72-generic root=UUID=19debf43-de1a-4f0d-97a7-c4d0ccd04327 ro audit=0 intel_iommu=on isolcpus=1-27,29-55 nmi_watchdog=0 nohz_full=1-27,29-55 nosoftlockup processor.max_cstate=1 rcu_nocbs=1-27,29-55 splash quiet vt.handoff=1
+
+Linux uname
+^^^^^^^^^^^
+
+::
+
+    $ uname -a
+    Linux s27-t34-sut1 4.15.0-72-generic #81-Ubuntu SMP Tue Nov 26 12:21:09 UTC 2019 aarch64 aarch64 aarch64 GNU/Linux
+
+
+.. include:: ../introduction/test_environment_sut_meltspec_tx2.rst
diff --git a/docs/report/introduction/test_environment_sut_meltspec_tx2.rst b/docs/report/introduction/test_environment_sut_meltspec_tx2.rst
new file mode 100644
index 0000000000..06a6921673
--- /dev/null
+++ b/docs/report/introduction/test_environment_sut_meltspec_tx2.rst
@@ -0,0 +1,141 @@
+Spectre and Meltdown Checks
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Following section displays the output of a running shell script to tell if
+system is vulnerable against the several "speculative execution" CVEs that were
+made public in 2018. Script is available on `Spectre & Meltdown Checker Github
+<https://github.com/speed47/spectre-meltdown-checker>`_.
+
+::
+
+  Spectre and Meltdown mitigation detection tool v0.44+
+
+  Checking for vulnerabilities on current system
+  Kernel is Linux 4.15.0-72-generic #81-Ubuntu SMP Tue Nov 26 12:21:09 UTC 2019 aarch64
+  CPU is
+
+  Hardware check
+  * CPU vulnerability to the speculative execution attack variants
+    * Affected by CVE-2017-5753 (Spectre Variant 1, bounds check bypass):  YES
+    * Affected by CVE-2017-5715 (Spectre Variant 2, branch target injection):  YES
+    * Affected by CVE-2017-5754 (Variant 3, Meltdown, rogue data cache load):  NO
+    * Affected by CVE-2018-3640 (Variant 3a, rogue system register read):  NO
+    * Affected by CVE-2018-3639 (Variant 4, speculative store bypass):  YES
+    * Affected by CVE-2018-3615 (Foreshadow (SGX), L1 terminal fault):  NO
+    * Affected by CVE-2018-3620 (Foreshadow-NG (OS), L1 terminal fault):  NO
+    * Affected by CVE-2018-3646 (Foreshadow-NG (VMM), L1 terminal fault):  NO
+    * Affected by CVE-2018-12126 (Fallout, microarchitectural store buffer data sampling (MSBDS)):  NO
+    * Affected by CVE-2018-12130 (ZombieLoad, microarchitectural fill buffer data sampling (MFBDS)):  NO
+    * Affected by CVE-2018-12127 (RIDL, microarchitectural load port data sampling (MLPDS)):  NO
+    * Affected by CVE-2019-11091 (RIDL, microarchitectural data sampling uncacheable memory (MDSUM)):  NO
+    * Affected by CVE-2019-11135 (ZombieLoad V2, TSX Asynchronous Abort (TAA)):  NO
+    * Affected by CVE-2018-12207 (No eXcuses, iTLB Multihit, machine check exception on page size changes (MCEPSC)):  NO
+    * Affected by CVE-2020-0543 (Special Register Buffer Data Sampling (SRBDS)):  NO
+
+  CVE-2017-5753 aka 'Spectre Variant 1, bounds check bypass'
+  * Mitigated according to the /sys interface:  YES  (Mitigation: __user pointer sanitization)
+  * Kernel has array_index_mask_nospec:  NO
+  * Kernel has the Red Hat/Ubuntu patch:  NO
+  * Kernel has mask_nospec64 (arm64):  NO
+  * Kernel has array_index_nospec (arm64):  NO
+  * Checking count of LFENCE instructions following a jump in kernel...  NO  (only 0 jump-then-lfence instructions found, should be >= 30 (heuristic))
+  > STATUS:  NOT VULNERABLE  (Mitigation: __user pointer sanitization)
+
+  CVE-2017-5715 aka 'Spectre Variant 2, branch target injection'
+  * Mitigated according to the /sys interface:  NO  (Vulnerable)
+  * Mitigation 1
+    * Kernel is compiled with IBRS support:  YES
+    * IBRS enabled and active:  NO
+    * Kernel is compiled with IBPB support:  NO
+    * IBPB enabled and active:  NO
+  * Mitigation 2
+    * Kernel has branch predictor hardening (arm):  YES
+    * Kernel compiled with retpoline option:  NO
+  > STATUS:  NOT VULNERABLE  (Branch predictor hardening mitigates the vulnerability)
+
+  CVE-2017-5754 aka 'Variant 3, Meltdown, rogue data cache load'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * Kernel supports Page Table Isolation (PTI):  YES
+    * PTI enabled and active:  UNKNOWN  (dmesg truncated, please reboot and relaunch this script)
+    * Reduced performance impact of PTI:  NO  (PCID/INVPCID not supported, performance impact of PTI will be significant)
+  * Running as a Xen PV DomU:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-3640 aka 'Variant 3a, rogue system register read'
+  * CPU microcode mitigates the vulnerability:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-3639 aka 'Variant 4, speculative store bypass'
+  * Mitigated according to the /sys interface:  NO  (Vulnerable)
+  * Kernel supports disabling speculative store bypass (SSB):  YES  (found in /proc/self/status)
+  * SSB mitigation is enabled and active: > STATUS:  VULNERABLE  (Your CPU doesn't support SSBD)
+
+  CVE-2018-3615 aka 'Foreshadow (SGX), L1 terminal fault'
+  * CPU microcode mitigates the vulnerability:  N/A
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-3620 aka 'Foreshadow-NG (OS), L1 terminal fault'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * Kernel supports PTE inversion:  NO
+  * PTE inversion enabled and active:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-3646 aka 'Foreshadow-NG (VMM), L1 terminal fault'
+  * Information from the /sys interface: Not affected
+  * This system is a host running a hypervisor:  NO
+  * Mitigation 1 (KVM)
+    * EPT is disabled:  N/A  (the kvm_intel module is not loaded)
+  * Mitigation 2
+    * L1D flush is supported by kernel:  NO
+    * L1D flush enabled:  NO
+    * Hardware-backed L1D flush supported:  NO  (flush will be done in software, this is slower)
+    * Hyper-Threading (SMT) is enabled:  UNKNOWN
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-12126 aka 'Fallout, microarchitectural store buffer data sampling (MSBDS)'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * Kernel supports using MD_CLEAR mitigation:  NO
+  * Kernel mitigation is enabled and active:  NO
+  * SMT is either mitigated or disabled:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-12130 aka 'ZombieLoad, microarchitectural fill buffer data sampling (MFBDS)'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * Kernel supports using MD_CLEAR mitigation:  NO
+  * Kernel mitigation is enabled and active:  NO
+  * SMT is either mitigated or disabled:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-12127 aka 'RIDL, microarchitectural load port data sampling (MLPDS)'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * Kernel supports using MD_CLEAR mitigation:  NO
+  * Kernel mitigation is enabled and active:  NO
+  * SMT is either mitigated or disabled:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2019-11091 aka 'RIDL, microarchitectural data sampling uncacheable memory (MDSUM)'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * Kernel supports using MD_CLEAR mitigation:  NO
+  * Kernel mitigation is enabled and active:  NO
+  * SMT is either mitigated or disabled:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2019-11135 aka 'ZombieLoad V2, TSX Asynchronous Abort (TAA)'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * TAA mitigation is supported by kernel:  YES  (found tsx_async_abort in kernel image)
+  * TAA mitigation enabled and active:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2018-12207 aka 'No eXcuses, iTLB Multihit, machine check exception on page size changes (MCEPSC)'
+  * Mitigated according to the /sys interface:  YES  (Not affected)
+  * This system is a host running a hypervisor:  NO
+  * iTLB Multihit mitigation is supported by kernel:  YES  (found itlb_multihit in kernel image)
+  * iTLB Multihit mitigation enabled and active:  NO
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  CVE-2020-0543 aka 'Special Register Buffer Data Sampling (SRBDS)'
+  * SRBDS mitigation control is supported by the kernel:  NO
+  * SRBDS mitigation control is enabled and active:  NO  (SRBDS not found in sysfs hierarchy)
+  > STATUS:  NOT VULNERABLE  (your CPU vendor reported your CPU model as not vulnerable)
+
+  > SUMMARY: CVE-2017-5753:OK CVE-2017-5715:OK CVE-2017-5754:OK CVE-2018-3640:OK CVE-2018-3639:KO CVE-2018-3615:OK CVE-2018-3620:OK CVE-2018-3646:OK CVE-2018-12126:OK CVE-2018-12130:OK CVE-2018-12127:OK CVE-2019-11091:OK CVE-2019-11135:OK CVE-2018-12207:OK CVE-2020-0543:OK
\ No newline at end of file