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| author |   Maciek Konstantynowicz <mkonstan@cisco.com> | 2022-03-03 17:45:31 +0000 |
|---|---|---|
| committer |   Peter Mikus <pmikus@cisco.com> | 2022-03-08 06:55:04 +0000 |
| commit | 26a677d37ed095e9a876b8a916d4c967ecfbbea1 (patch) | |
| tree | a8f872b11d3ea37f351d32023570a03aef94f860 /docs/report/introduction | |
| parent | 350c4db98d3e57ec1d4412d8f0e7dd327ae8b897 (diff) | |
report: update vpp performance rls notes
Change-Id: Ia933d6719c41100524fd1e64990b38e03604c5ec
Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
Diffstat (limited to 'docs/report/introduction')
| -rw-r--r-- | docs/report/introduction/physical_testbeds.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst index 9bb0a05f99..cfd43d0653 100644 --- a/docs/report/introduction/physical_testbeds.rst +++ b/docs/report/introduction/physical_testbeds.rst @@ -160,6 +160,8 @@ TG NICs: All Intel Xeon Cascadelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. +.. _physical_testbeds_2n_icx: + 2-Node Xeon Icelake (2n-icx) ---------------------------- @@ -193,6 +195,8 @@ SUT and TG NICs: All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. +.. _physical_testbeds_3n_icx: + 3-Node Xeon Icelake (3n-icx) ---------------------------- |