diff options
| author |   Peter Mikus <pmikus@cisco.com> | 2017-05-22 09:35:17 +0200 |
|---|---|---|
| committer | Peter Mikus <pmikus@cisco.com> | 2017-05-25 05:39:30 +0000 |
| commit | 10649b3ce07bbb3144d196c403d8c1fa65ddf116 (patch) | |
| tree | e76a123f6c4fe1390aab02fbbc67a28ac2e714c2 /docs/report/testpmd_performance_tests/overview.rst | |
| parent | e6e0c3ad0236d3b2ffb91ae757d84acfb97273b5 (diff) | |
CSIT-612 Report: Minimization of hand-crafted content.
- replace dynamic text content and links by variables.
Change-Id: I1a7ec371fc80af3c9dd416bf91dd2c639097cf1e
Signed-off-by: Peter Mikus <pmikus@cisco.com>
Diffstat (limited to 'docs/report/testpmd_performance_tests/overview.rst')
| -rw-r--r-- | docs/report/testpmd_performance_tests/overview.rst | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/docs/report/testpmd_performance_tests/overview.rst b/docs/report/testpmd_performance_tests/overview.rst index 2182a00cd8..78d214808a 100644 --- a/docs/report/testpmd_performance_tests/overview.rst +++ b/docs/report/testpmd_performance_tests/overview.rst @@ -42,7 +42,8 @@ tested NIC models include: #. 2port40GE VIC1385 Cisco. #. 2port40GE XL710 Intel. -For detailed LF FD.io test bed specification and physical topology please refer to `LF FDio CSIT testbed wiki page <https://wiki.fd.io/view/CSIT/CSIT_LF_testbed>`_. +For detailed LF FD.io test bed specification and physical topology please refer +to `LF FDio CSIT testbed wiki page <https://wiki.fd.io/view/CSIT/CSIT_LF_testbed>`_. Performance Tests Coverage -------------------------- @@ -150,4 +151,4 @@ Reported latency values are measured using following methodology: - TRex setup introduces an always-on error of about 2*2usec per latency flow - additonal Tx/Rx interface latency induced by TRex SW writing and reading packet timestamps on CPU cores without HW acceleration on NICs closer to the - interface line.
\ No newline at end of file + interface line. |