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author | 2019-08-19 15:25:47 +0200 | |
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committer | 2019-08-26 09:14:50 +0200 | |
commit | 33cfe1217cb2d6bc9655b01f200b0ec8d5ccb466 (patch) | |
tree | 374ac3120edb635caab74d21b6a09c7401e3068e /docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst | |
parent | ff820e3d53434889aacde2373314c3be8d00f765 (diff) |
Report: Select tests by name, specifications
Change-Id: Ibcc5e67d49fba9c02b07af462a74d2a062412979
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst')
-rw-r--r-- | docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst index b523cfde75..a3902e6d92 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst @@ -13,13 +13,12 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls1901>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls1908>`_. .. toctree:: - ip4-3n-hsw-x520 - ip4-3n-hsw-x710 - ip4-3n-hsw-xl710 - ip4-3n-skx-x710 - ip4-2n-skx-x710 ip4-2n-skx-xxv710 + ip4-2n-skx-x710 + ip4-3n-skx-xxv710 + ip4-3n-skx-x710 + ip4-3n-hsw-xl710 |