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| author |   Maciek Konstantynowicz <mkonstan@cisco.com> | 2017-05-03 13:17:42 +0100 |
|---|---|---|
| committer |   Peter Mikus <pmikus@cisco.com> | 2017-05-03 12:50:48 +0000 |
| commit | 23e16859b876f06697f49aa486e0fad178a675a6 (patch) | |
| tree | c4850c854ce881eff9fc39685b6beec78ede017c /docs/report/vpp_performance_tests/packet_latency_graphs/ipv6.rst | |
| parent | efa8a6b6ac4ad963114f025c4ae4a38fb831bdf7 (diff) | |
Updates to csit rls1704 report related to increased number of test job executions.
Change-Id: If16e312eeb377cabc96fe1a671d9bdfedf5e87b0
Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
(cherry picked from commit a6644da0fb0bcd9513995c5d2aecdefb4bbdaf25)
Diffstat (limited to 'docs/report/vpp_performance_tests/packet_latency_graphs/ipv6.rst')
| -rw-r--r-- | docs/report/vpp_performance_tests/packet_latency_graphs/ipv6.rst | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/ipv6.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/ipv6.rst index 93c1befe0d..fd556a3134 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/ipv6.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/ipv6.rst @@ -7,28 +7,6 @@ rate. Latency is reported for VPP running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. -Results are generated from a single execution of CSIT NDR discovery -test. Box plots are used to show the Minimum, Average and Maximum packet -latency per test. - -*Title of each graph* is a regex (regular expression) matching all -throughput test cases plotted on this graph, *X-axis labels* are indices -of individual test suites executed by csit-vpp-perf-1704-all job that -created result output file used as data source for the graph, *Y-axis -labels* are measured packet Latency [uSec] values, and the *Graph -legend* lists the plotted test suites and their indices. Latency is -reported for concurrent symmetric bi-directional flows, separately for -each direction: i) West-to-East: TGint1-to-SUT1-to-SUT2-to-TGint2, and -ii) East-to-West: TGint2-to-SUT2-to-SUT1-to-TGint1. - -.. note:: - - Test results have been generated by FD.io test executor jobs - `csit-vpp-perf-1704-all - <https://jenkins.fd.io/view/csit/job/csit-vpp-perf-1704-all/>`_, - with Robot Framework result files csit-vpp-perf-1704-all-<id>.zip - `archived here <../../_static/archive/>`_. - VPP packet latency in 1t1c setup (1thread, 1core) is presented in the graph below. .. raw:: html |