diff options
| author |   Peter Mikus <pmikus@cisco.com> | 2017-07-26 11:49:45 +0200 |
|---|---|---|
| committer | Peter Mikus <pmikus@cisco.com> | 2017-07-26 11:49:45 +0200 |
| commit | e312d70bfe230efcdce9ff933aa61a6bcc1a8f3c (patch) | |
| tree | ea54c910d7d82ae210fe3ea313fdadf1600bba7b /docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst | |
| parent | c70b9cd6c48d71208cf729ba335ff9753e94b694 (diff) | |
CSIT-618 Update release report datapoints
Change-Id: Id1fe7dc826bb22e4267c29cce2a544c314ac0648
Signed-off-by: Peter Mikus <pmikus@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst')
| -rw-r--r-- | docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst index d6e76a7c88..508d33c43a 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst @@ -13,13 +13,15 @@ VPP packet latency in 1t1c setup (1thread, 1core) is presented in the graph belo <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/64B-1t1c-l2-sel1-ndrdisc-lat50.html"></iframe> -*Figure 1a. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet Switching.* +*Figure 1a. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet +Switching (base).* .. raw:: html <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/64B-1t1c-l2-sel2-ndrdisc-lat50.html"></iframe> -*Figure 1b. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet Switching.* +*Figure 1b. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet +Switching (feature).* CSIT source code for the test cases used for above plots can be found in CSIT git repository: @@ -33,13 +35,15 @@ VPP packet latency in 2t2c setup (2thread, 2core) is presented in the graph belo <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/64B-2t2c-l2-sel1-ndrdisc-lat50.html"></iframe> -*Figure 2a. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet Switching.* +*Figure 2a. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet +Switching (base).* .. raw:: html <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/64B-2t2c-l2-sel2-ndrdisc-lat50.html"></iframe> -*Figure 2b. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet Switching.* +*Figure 2b. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet +Switching (feature).* CSIT source code for the test cases used for above plots can be found in CSIT git repository: |