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authorMaciek Konstantynowicz <mkonstan@cisco.com>2017-04-27 12:11:56 +0100
committerMaciek Konstantynowicz <mkonstan@cisco.com>2017-04-27 13:02:13 +0100
commitfa8714742330382e764419c0432099702f182da1 (patch)
treeb57f6c25267ec6c906bb1563f12fdab6c72f8d84 /docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
parentfc30d9f7d402c82b69ba3c93d87bf5d7536a13a8 (diff)
csit rls1704 report: final update to csit_release_notes.rst, packet_*_graphs.rst files.
Change-Id: I531706f87716a3db8c5417be6ce4933e02e2a622 Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst')
-rw-r--r--docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst2
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
index f7836feeef..a017a42773 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
@@ -27,7 +27,7 @@ ii) East-to-West: TGint2-to-SUT2-to-SUT1-to-TGint1.
`csit-vpp-perf-1704-all
<https://jenkins.fd.io/view/csit/job/csit-vpp-perf-1704-all/>`_,
with Robot Framework result files csit-vpp-perf-1704-all-<id>.zip
- `archived here <../../_static/archive/>`_
+ `archived here <../../_static/archive/>`_.
VPP packet latency in 1t1c setup (1thread, 1core) is presented in the graph below.