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author | 2018-11-05 15:01:37 +0100 | |
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committer | 2018-11-05 15:01:37 +0100 | |
commit | b641b5bf12a0d1b63ac9afb7c89133297d3b63fe (patch) | |
tree | 88342914639827399e40c68bf6c029f9e53cea3b /docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst | |
parent | 312e541e0cc53a10429c40b41ad7f22ae4b8adc2 (diff) |
CSIT-1342: Edit the static content for CSIT-1810 report
Change-Id: I44abd4ad646813cc70e9fa2b46b51ee7613dc501
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst')
-rw-r--r-- | docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst index ca30ee470f..db767807f4 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst @@ -1,8 +1,4 @@ -.. raw:: latex - - \clearpage - .. raw:: html <script type="text/javascript"> @@ -40,6 +36,10 @@ physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in `CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls1810>`_. +.. raw:: latex + + \clearpage + 3n-hsw-x520 ~~~~~~~~~~~ |