diff options
author | 2021-05-31 10:35:20 +0200 | |
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committer | 2021-06-02 10:46:54 +0200 | |
commit | c10980893443b59c464deb6cd0d66d5be972593f (patch) | |
tree | fe629b6fdc30082eb95379b87bd79f07efdb7c42 /docs/report/vpp_performance_tests/packet_throughput_graphs/l2.rst | |
parent | 3793e1525f12ca1bdbd2140254eae31535818c27 (diff) |
Report: Configure report
+ 2101 --> 2106
+ remove 3n-hsw
+ unify data sets
+ configure data sets
- implement changes from job-specs
Change-Id: I200e7a80ebf88864ce4a7a2134f5251b557f6a3a
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/packet_throughput_graphs/l2.rst')
-rw-r--r-- | docs/report/vpp_performance_tests/packet_throughput_graphs/l2.rst | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/docs/report/vpp_performance_tests/packet_throughput_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_throughput_graphs/l2.rst index c2e92b569b..0ecd826618 100644 --- a/docs/report/vpp_performance_tests/packet_throughput_graphs/l2.rst +++ b/docs/report/vpp_performance_tests/packet_throughput_graphs/l2.rst @@ -13,7 +13,7 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls2101>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls2106>`_. .. toctree:: @@ -26,7 +26,6 @@ CSIT source code for the test cases used for plots can be found in l2-2n-clx-cx556a l2-2n-zn2-xxv710 l2-2n-zn2-x710 - l2-3n-hsw-xl710 l2-3n-tsh-x520 l2-2n-tx2-xl710 l2-2n-dnv-x553 |