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author | Tibor Frank <tifrank@cisco.com> | 2020-01-09 15:02:10 +0100 |
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committer | Tibor Frank <tifrank@cisco.com> | 2020-01-10 07:50:26 +0000 |
commit | 80e558550b0f076857618c4451987fb60ced19b9 (patch) | |
tree | 78a2fe2dcd9e59405449e5493f5a16d4803cfa24 /docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst | |
parent | a08fc340f548a4b223c7c139b4fe59531cf7c694 (diff) |
Report: Add 2n-clx
Change-Id: I34dc11c28d21f0b9fed87d76942fe8b8cdd86c88
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst')
-rw-r--r-- | docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst index 97206f1b76..2657dcf366 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst @@ -15,10 +15,11 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1908>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls2001>`_. .. toctree:: container_memif-2n-skx-xxv710 container_memif-3n-skx-xxv710 + container_memif-2n-clx-xxv710 container_memif-3n-tsh-x520 |