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author | Tibor Frank <tifrank@cisco.com> | 2022-02-07 14:47:08 +0100 |
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committer | Tibor Frank <tifrank@cisco.com> | 2022-02-07 14:52:39 +0100 |
commit | e7197f5428b5eb836a6fa636ff4ec9f14a65deca (patch) | |
tree | 2f7cf7ec54fb7f0f75b71b3557b4299dc6fc825f /docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst | |
parent | 54fcebc6cdab6a2bff1e88bb07970ef3fe112508 (diff) |
Report: Small fixes
Change-Id: Ib2cb94c747168b773409c18e3e366ebf3400ab99
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst')
-rw-r--r-- | docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst index f2fc7268d4..0c3cb4f547 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst @@ -15,14 +15,14 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls2110>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls2202>`_. .. toctree:: + container_memif-2n-icx-xxv710 container_memif-2n-skx-xxv710 container_memif-2n-clx-xxv710 container_memif-2n-clx-cx556a - container_memif-2n-icx-xxv710 container_memif-2n-zn2-xxv710 container_memif-2n-zn2-cx556a |