Report: data, figures desc

Change-Id: I6751b6ae833610456e1dea938d5262c28b93439d
Signed-off-by: Tibor Frank <tifrank@cisco.com>

1 files changed, 9 insertions, 9 deletions

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
index 2df3fb6229..f898534626 100644
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
@@ -31,6 +31,9 @@ NIC 10ge2p1x520
             \label{fig:10ge2p1x520-64B-l2-tsa-ndrdisc}
     \end{figure}
 
+*Figure 1. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
+NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
+
 CSIT source code for the test cases used for above plots can be found in CSIT
 git repository:
 
@@ -45,9 +48,6 @@ git repository:
 
       $ grep -E "64B-(1t1c|2t2c|4t4c)-(eth|dot1q|dot1ad)-(l2xcbase|l2bdbasemaclrn|l2bdscale.*|l2dbscale.*)-(eth.*)*ndrdisc" tests/vpp/perf/l2/10ge2p1x520*
 
-*Figure 1. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
 NIC 40ge2p1xl710
 ~~~~~~~~~~~~~~~~
 
@@ -64,6 +64,9 @@ NIC 40ge2p1xl710
             \label{fig:40ge2p1xl710-64B-l2-tsa-ndrdisc}
     \end{figure}
 
+*Figure 2. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
+NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
+
 CSIT source code for the test cases used for above plots can be found in CSIT
 git repository:
 
@@ -78,9 +81,6 @@ git repository:
 
       $ grep -E "64B-(1t1c|2t2c|4t4c)-(eth|dot1q|dot1ad)-(l2xcbase|l2bdbasemaclrn|l2bdscale.*|l2dbscale.*)-(eth.*)*ndrdisc" tests/vpp/perf/l2/40ge2p1xl710*
 
-*Figure 2. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
 PDR Throughput
 --------------
 
@@ -104,6 +104,9 @@ NIC 10ge2p1x520
             \label{fig:10ge2p1x520-64B-l2-tsa-pdrdisc}
     \end{figure}
 
+*Figure 3. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
+PDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
+
 CSIT source code for the test cases used for above plots can be found in CSIT
 git repository:
 
@@ -117,6 +120,3 @@ git repository:
    .. code-block:: bash
 
       $ grep -E "64B-(1t1c|2t2c|4t4c)-(eth|dot1q|dot1ad)-(l2xcbase|l2bdbasemaclrn|l2bdscale.*|l2dbscale.*)-(eth.*)*pdrdisc" tests/vpp/perf/l2/10ge2p1x520*
-
-*Figure 3. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-PDR Throughput for Phy-to-Phy L2 Ethernet Switching.*