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author | Tibor Frank <tifrank@cisco.com> | 2018-08-02 10:03:43 +0200 |
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committer | Tibor Frank <tifrank@cisco.com> | 2018-08-02 14:21:39 +0200 |
commit | e59007133ffb0a6f38badf11fcb5d9cd2dc8da25 (patch) | |
tree | a98801e20cd573243e21854bc701cf91624d0a40 /docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst | |
parent | 1e000ed7785445d96588ab302b154c563d5d9331 (diff) |
FIX: Report TSA
Change-Id: Ieb29a1e213a5f8aa74054da57ceb15925fe4dee3
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst')
-rw-r--r-- | docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst new file mode 100644 index 0000000000..bf0108c20a --- /dev/null +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/vts.rst @@ -0,0 +1,63 @@ +VTS +=== + +Following sections include Throughput Speedup Analysis for VPP multi- +core multi-thread configurations with no Hyper-Threading, specifically +for tested 2t2c (2threads, 2cores) and 4t4c scenarios. 1t1c throughput +results are used as a reference for reported speedup ratio. Input data +used for the graphs comes from Phy-to-Phy 64B performance tests with +VM vhost-user, including NDR throughput (zero packet loss) and +PDR throughput (<0.5% packet loss). + +CSIT source code for the test cases used for plots can be found in +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls1807>`_. + +3n-hsw-x520 +~~~~~~~~~~~ + +64b-base_and_scale +------------------ + +.. raw:: html + + <center><b> + +:index:`Speedup: vts-3n-hsw-x520-64b-base_and_scale-ndr` + +.. raw:: html + + </b> + <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/vts-3n-hsw-x520-64b-base_and_scale-ndr-tsa.html"></iframe> + <p><br><br></p> + </center> + +.. raw:: latex + + \begin{figure}[H] + \centering + \graphicspath{{../_build/_static/vpp/}} + \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{vts-3n-hsw-x520-64b-base_and_scale-ndr-tsa} + \label{fig:vts-3n-hsw-x520-64b-base_and_scale-ndr-tsa} + \end{figure} + +.. raw:: html + + <center><b> + +:index:`Speedup: vts-3n-hsw-x520-64b-base_and_scale-pdr` + +.. raw:: html + + </b> + <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/vts-3n-hsw-x520-64b-base_and_scale-pdr-tsa.html"></iframe> + <p><br><br></p> + </center> + +.. raw:: latex + + \begin{figure}[H] + \centering + \graphicspath{{../_build/_static/vpp/}} + \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{vts-3n-hsw-x520-64b-base_and_scale-pdr-tsa} + \label{fig:vts-3n-hsw-x520-64b-base_and_scale-pdr-tsa} + \end{figure} |