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author | Maciek Konstantynowicz <mkonstan@cisco.com> | 2021-08-03 20:51:12 +0100 |
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committer | Peter Mikus <pmikus@cisco.com> | 2021-08-04 13:25:05 +0000 |
commit | 61d020ed404923283dcd87424a7845dcd84bd66a (patch) | |
tree | 58a612049d8b9d70cc915707ec13a8d2f5dc367f /docs | |
parent | 5b5790e52de6562ec6d5e6a9ddf2df24f8be7993 (diff) |
report: add nic and drivers section to physical testbeds description
Change-Id: I75fd902e32b290e62f7eb9fcd8b2b5b7a4b713e6
Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
Diffstat (limited to 'docs')
-rw-r--r-- | docs/report/introduction/physical_testbeds.rst | 86 |
1 files changed, 55 insertions, 31 deletions
diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst index fbc16eeaa3..60b06e68dc 100644 --- a/docs/report/introduction/physical_testbeds.rst +++ b/docs/report/introduction/physical_testbeds.rst @@ -1,7 +1,7 @@ .. _tested_physical_topologies: -Physical Testbeds -================= +Performance Physical Testbeds +============================= All :abbr:`FD.io (Fast Data Input/Ouput)` :abbr:`CSIT (Continuous System Integration and Testing)` performance test results included in this @@ -26,8 +26,8 @@ Two physical server topology types are used: Current FD.io production testbeds are built with SUT servers based on the following processor architectures: -- Intel Xeon: Skylake Platinum 8180, Cascadelake 6252N, (Icelake 8358 - installation in progress). +- Intel Xeon: Skylake Platinum 8180, Cascadelake 6252N, (Icelake 8358 + to be added). - Intel Atom: Denverton C3858. - Arm: TaiShan 2280, hip07-d05. - AMD EPYC: Zen2 7532. @@ -46,7 +46,39 @@ Complete technical specifications of compute servers used in CSIT physical testbeds are maintained in FD.io CSIT repository: https://git.fd.io/csit/tree/docs/lab/testbed_specifications.md. -Following is the description of existing production testbeds. +Physical NICs and Drivers +------------------------- + +SUT and TG servers are equipped with a number of different NIC models. + +VPP is performance tested on SUTs with the following NICs and drivers: + +#. 2p10GE: x520, x550, x553 Intel (codename Niantic) + - DPDK Poll Mode Driver (PMD). +#. 4p10GE: x710-DA4 Intel (codename Fortville, FVL) + - DPDK PMD. + - AVF in PMD mode. + - AF_XDP in PMD mode. +#. 2p25GE: xxv710-DA2 Intel (codename Fortville, FVL) + - DPDK PMD. + - AVF in PMD mode. + - AF_XDP in PMD mode. +#. 2p100GE: cx556a-edat Mellanox ConnectX5 + - RDMA_core in PMD mode. +#. 2p100GE: E810-2CQDA2 Intel (codename Columbiaville, CVL) + - DPDK PMD. + - AVF in PMD mode. + +DPDK applications, testpmd and l3fwd, are performance tested on the same +SUTs exclusively with DPDK drivers for all NICs. + +TRex running on TGs is using DPDK drivers for all NICs. + +VPP hoststack tests utilize ab (Apache HTTP server benchmarking tool) +running on TGs and using Linux drivers for all NICs. + +For more information see :ref:`vpp_test_environment` +and :ref:`dpdk_test_environment`. 2-Node AMD EPYC Zen2 (2n-zn2) ----------------------------- @@ -73,14 +105,13 @@ GHz, 32 cores). 2n-zn2 physical topology is shown below. :alt: testbed-2n-zn2 :align: center -SUT server is populated with the following NIC models: +SUT NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. #. NIC-3: cx556a-edat ConnectX5 2p100GE Mellanox. -TG server runs TRex application and is populated with the following -NIC models: +TG NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -115,7 +146,7 @@ Cache, 2.70 GHz, 28 cores). 2n-clx physical topology is shown below. :alt: testbed-2n-clx :align: center -SUT servers are populated with the following NIC models: +SUT NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -124,8 +155,7 @@ SUT servers are populated with the following NIC models: #. NIC-5: empty, future expansion. #. NIC-6: empty, future expansion. -TG servers run T-Rex application and are populated with the following -NIC models: +TG NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -164,7 +194,7 @@ is shown below. :alt: testbed-2n-icx :align: center -SUT and TG servers are populated with the following NIC models: +SUT and TG NICs: #. NIC-1: E810-2CQDA2 2p100GbE Intel. @@ -198,7 +228,7 @@ physical topology is shown below. :alt: testbed-3n-icx :align: center -SUT and TG servers are populated with the following NIC models: +SUT and TG NICs: #. NIC-1: E810-2CQDA2 2p100GbE Intel. @@ -230,7 +260,7 @@ Cache, 2.50 GHz, 28 cores). 2n-skx physical topology is shown below. :alt: testbed-2n-skx :align: center -SUT servers are populated with the following NIC models: +SUT NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -239,8 +269,7 @@ SUT servers are populated with the following NIC models: #. NIC-5: empty, future expansion. #. NIC-6: empty, future expansion. -TG servers run T-Rex application and are populated with the following -NIC models: +TG NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -278,7 +307,7 @@ Cache, 2.50 GHz, 28 cores). 3n-skx physical topology is shown below. :alt: testbed-3n-skx :align: center -SUT1 and SUT2 servers are populated with the following NIC models: +SUT1 and SUT2 NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -287,8 +316,7 @@ SUT1 and SUT2 servers are populated with the following NIC models: #. NIC-5: empty, future expansion. #. NIC-6: empty, future expansion. -TG servers run T-Rex application and are populated with the following -NIC models: +TG NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -327,15 +355,14 @@ Cache, 2.00 GHz, 12 cores). 2n-dnv physical topology is shown below. :alt: testbed-2n-dnv :align: center -SUT server have four internal 10G NIC port: +SUT 10GE NIC ports: #. P-1: x553 copper port. #. P-2: x553 copper port. #. P-3: x553 fiber port. #. P-4: x553 fiber port. -TG server run T-Rex software traffic generator and are populated with the -following NIC models: +TG NICs: #. NIC-1: x550-T2 2p10GE Intel. #. NIC-2: x550-T2 2p10GE Intel. @@ -371,13 +398,12 @@ topology is shown below. :alt: testbed-3n-dnv :align: center -SUT1 and SUT2 servers are populated with the following NIC models: +SUT1 and SUT2 NICs: #. NIC-1: x553 2p10GE fiber Intel. #. NIC-2: x553 2p10GE copper Intel. -TG servers run T-Rex application and are populated with the following -NIC models: +TG NICs: #. NIC-1: x710-DA4 4p10GE Intel. @@ -407,13 +433,12 @@ processor (64* ARM Cortex-A72). 3n-tsh physical topology is shown below. :alt: testbed-3n-tsh :align: center -SUT1 and SUT2 servers are populated with the following NIC models: +SUT1 and SUT2 NICs: #. NIC-1: connectx4 2p25GE Mellanox. #. NIC-2: x520 2p10GE Intel. -TG server runs T-Rex application and is populated with the following -NIC models: +TG NICs: #. NIC-1: x710-DA4 4p10GE Intel. #. NIC-2: xxv710-DA2 2p25GE Intel. @@ -445,12 +470,11 @@ ThunderX2 ARMv8 CN9975 processors. 2n-tx2 physical topology is shown below. :alt: testbed-2n-tx2 :align: center -SUT server is populated with the following NIC models: +SUT NICs: #. NIC-1: xl710-QDA2 2p40GE Intel (not connected). #. NIC-2: xl710-QDA2 2p40GE Intel. -TG server run T-Rex application and is populated with the following -NIC models: +TG NICs: #. NIC-1: xl710-QDA2 2p40GE Intel. |