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authorPeter Mikus <pmikus@cisco.com>2022-06-14 11:14:49 +0000
committerPeter Mikus <pmikus@cisco.com>2022-06-14 11:14:49 +0000
commit1b97d7088f4db702b05c0fd4cbc02a52c97e4529 (patch)
tree709dc65e677793f5918e0e66f87c323a0af5b2e8 /docs
parent04288f6c4806fad01710225e4c4b789704e399d7 (diff)
doc(report): Update test environment
Signed-off-by: Peter Mikus <pmikus@cisco.com> Change-Id: I9987cac1493ea75eb097a0f2123768eec1ca3d73
Diffstat (limited to 'docs')
-rw-r--r--docs/report/introduction/test_environment_changes_vpp.rst4
-rw-r--r--docs/report/introduction/test_environment_intro.rst11
-rw-r--r--docs/report/vpp_performance_tests/csit_release_notes.rst2
3 files changed, 14 insertions, 3 deletions
diff --git a/docs/report/introduction/test_environment_changes_vpp.rst b/docs/report/introduction/test_environment_changes_vpp.rst
index 83a9eedffb..5f3d3bf3e9 100644
--- a/docs/report/introduction/test_environment_changes_vpp.rst
+++ b/docs/report/introduction/test_environment_changes_vpp.rst
@@ -17,8 +17,8 @@ topology types are used:
- **2-Node Topology**: Consisting of one server acting as SUTs and one
server as TG both connected in ring topology.
-Tested SUT servers are based on a range of processors including Intel
-Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm,
+Tested SUT servers are based on a range of processors including
+Intel Xeon Icelake-SP, Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm,
Intel Atom. More detailed description is provided in
:ref:`tested_physical_topologies`. Tested logical topologies are
described in :ref:`tested_logical_topologies`.
diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst
index cc7bd74185..4f96c6237b 100644
--- a/docs/report/introduction/test_environment_intro.rst
+++ b/docs/report/introduction/test_environment_intro.rst
@@ -110,4 +110,15 @@ Following is the list of CSIT versions to date:
`CSIT <https://git.fd.io/csit/tree/?h=rls2202>`_).
- Intel NIC 700/800 series firmware upgrade based on DPDK compatibility
+ matrix.
+- Ver. 10 associated with CSIT rls2206 branch (`HW
+ <https://git.fd.io/csit/tree/docs/lab?h=rls2206>`_, `Linux
+ <https://s3-docs.fd.io/csit/rls2206/report/vpp_performance_tests/test_environment.html#sut-settings-linux>`_,
+ `TRex
+ <https://s3-docs.fd.io/csit/rls2206/report/vpp_performance_tests/test_environment.html#tg-settings-trex>`_,
+ `CSIT <https://git.fd.io/csit/tree/?h=rls2206>`_).
+
+ - Intel NIC 700/800 series firmware upgrade based on DPDK compatibility
+ matrix.
+ - Mellanox 556A series firmware upgrade based on DPDK compatibility
matrix. \ No newline at end of file
diff --git a/docs/report/vpp_performance_tests/csit_release_notes.rst b/docs/report/vpp_performance_tests/csit_release_notes.rst
index fad83c3795..8590ac5c2e 100644
--- a/docs/report/vpp_performance_tests/csit_release_notes.rst
+++ b/docs/report/vpp_performance_tests/csit_release_notes.rst
@@ -41,7 +41,7 @@ Changes in |csit-release|
#. TEST FRAMEWORK
- - **CSIT test environment** version has been updated to ver. 9, see
+ - **CSIT test environment** version has been updated to ver. 10, see
:ref:`test_environment_versioning`.
- **CSIT PAPI support**: Due to issues with PAPI performance, and