diff options
| author |   pmikus <peter.mikus@protonmail.ch> | 2023-11-24 13:46:41 +0000 |
|---|---|---|
| committer | Peter Mikus <peter.mikus@protonmail.ch> | 2023-12-11 14:46:40 +0000 |
| commit | 21ce2e82737ddb8fa8d23e7a9a7714caa8fc1e01 (patch) | |
| tree | 2674e7f56cc6b3a3428b312e1302cefbb95406c7 /resources/job_specs/report_coverage/2n-spr/lb-10.md | |
| parent | c475e24c7dc264c03782919d792994f84ff43fe7 (diff) | |
feat(job_specs): Add 200ge6p3cx7veat tests
Signed-off-by: Peter Mikus <peter.mikus@protonmail.ch>
Change-Id: Ia713b9a0b962820b014bad3582bc095ec802380c
Diffstat (limited to 'resources/job_specs/report_coverage/2n-spr/lb-10.md')
| -rw-r--r-- | resources/job_specs/report_coverage/2n-spr/lb-10.md | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/resources/job_specs/report_coverage/2n-spr/lb-10.md b/resources/job_specs/report_coverage/2n-spr/lb-10.md index 29ab3e4e6d..e3ab16262d 100644 --- a/resources/job_specs/report_coverage/2n-spr/lb-10.md +++ b/resources/job_specs/report_coverage/2n-spr/lb-10.md @@ -3,32 +3,32 @@ ### mellanox-cx7veat #### drv_mlx5_core ##### ethip4-loadbalancer-l3dsr -1c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -2c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -4c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -1c AND 1518b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -2c AND 1518b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -1c AND 9000b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -1c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -2c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr -4c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +1c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +2c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +4c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +1c AND 1518b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +2c AND 1518b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +1c AND 9000b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +1c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +2c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr +4c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-l3dsr ##### ethip4-loadbalancer-maglev -1c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -2c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -4c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -1c AND 1518b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -2c AND 1518b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -1c AND 9000b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -1c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -2c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev -4c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +1c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +2c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +4c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +1c AND 1518b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +2c AND 1518b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +1c AND 9000b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +1c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +2c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev +4c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-maglev ##### ethip4-loadbalancer-nat4 -1c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -2c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -4c AND 64b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -1c AND 1518b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -2c AND 1518b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -1c AND 9000b AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -1c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -2c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 -4c AND imix AND ndrpdr AND cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4
\ No newline at end of file +1c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +2c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +4c AND 64b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +1c AND 1518b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +2c AND 1518b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +1c AND 9000b AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +1c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +2c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4 +4c AND imix AND ndrpdr AND 2p1cx7veat AND drv_mlx5_core AND ethip4-loadbalancer-nat4
\ No newline at end of file |