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-rw-r--r--docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst10
1 files changed, 2 insertions, 8 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
index 0ffeef5546..3c3fceb7dd 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
@@ -13,15 +13,9 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1901>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1908>`_.
.. toctree::
- container_memif-3n-hsw-x520
- container_memif-3n-hsw-x710
- container_memif-3n-hsw-xl710
- container_memif-3n-skx-x710
- container_memif-2n-skx-x710
-
-..
container_memif-2n-skx-xxv710
+ container_memif-3n-skx-xxv710