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-rw-r--r--docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst2
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
index 78d258c498..b523cfde75 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
@@ -13,7 +13,7 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls1810>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls1901>`_.
.. toctree::