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-rw-r--r--docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst5
1 files changed, 3 insertions, 2 deletions
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst
index b5ff6bf401..89e7b1a37e 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst
@@ -13,8 +13,9 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/srv6?h=rls1901>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/srv6?h=rls1908>`_.
.. toctree::
- srv6-3n-hsw-x520
+ srv6-3n-skx-xxv710
+ srv6-3n-hsw-xl710