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-rw-r--r--docs/report/vpp_performance_tests/packet_throughput_graphs/vts.rst5
1 files changed, 3 insertions, 2 deletions
diff --git a/docs/report/vpp_performance_tests/packet_throughput_graphs/vts.rst b/docs/report/vpp_performance_tests/packet_throughput_graphs/vts.rst
index 86832f9bb8..e084387203 100644
--- a/docs/report/vpp_performance_tests/packet_throughput_graphs/vts.rst
+++ b/docs/report/vpp_performance_tests/packet_throughput_graphs/vts.rst
@@ -14,8 +14,9 @@ configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s),
and their physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls1908>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls1908_2>`_.
.. toctree::
- vts-3n-tsh-x520
+ vts-2n-skx-xxv710
+ vts-2n-clx-xxv710