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-rw-r--r--docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst5
1 files changed, 4 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
index 84aa290df2..ebbc71054a 100644
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
@@ -15,7 +15,7 @@ L2 Ethernet switching, including NDR throughput (zero packet loss) and
PDR throughput (<0.5% packet loss).
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls1908>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls1908_2>`_.
.. toctree::
@@ -23,6 +23,9 @@ CSIT source code for the test cases used for plots can be found in
l2-2n-skx-x710
l2-3n-skx-xxv710
l2-3n-skx-x710
+ l2-2n-clx-xxv710
+ l2-2n-clx-x710
+ l2-2n-clx-cx556a
l2-3n-hsw-xl710
l2-3n-tsh-x520
l2-2n-dnv-x553