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2021-06-10FIX: Pylint reducepmikus1-1/+1
Signed-off-by: pmikus <pmikus@cisco.com> Change-Id: I909942dbb920df7f0fe15c0c92cda92c3cd8d8ad
2021-03-16Perf: Bump T-Rex to 2.88pmikus1-1/+1
+ Mellanox 4.6 is not for Ubuntu 20.04 + Mellanox for ubuntu 20.04 is 4.9+ + T-Rex 2.86 is not for Mellanox 4.6+ + T-Rex for Mellanox 5.2 is 2.88+ ================================== = Bump Signed-off-by: pmikus <pmikus@cisco.com> Change-Id: I902dfc2a43e6718b385e89f31a34260e09d61bd3
2021-01-12License: Wrap GPL block to 80 charactersVratko Polak1-2/+3
The original license block was adapted from https://wiki.fd.io/view/TSC/Proposed_Header_Python_Test_Scripts resulting in a line longer than 80 chars, but those are reported (although not blocked) by tox verify job. As the text from wiki was not used in verbatim (it uses c-style comment block), minor formatting change like this should not be a big deal. + Bump copyright year. Change-Id: I55e3a0232639b448b1a6d7b1f3af84d903a8d0a5 Signed-off-by: Vratko Polak <vrpolak@cisco.com>
2020-11-18T-Rex: 2.86pmikus1-1/+1
Signed-off-by: pmikus <pmikus@cisco.com> Change-Id: Id56b87ab868f2897a6563914b0beca2acc25e706
2020-11-12Switch licenses in GPL directoryVratko Polak1-3/+12
To be merged after this completes: https://wiki.fd.io/view/TSC/Relicensing_Procedure Change-Id: I003e53a620a5f82ba2bcc65b12f9c84ae92264ef Signed-off-by: Vratko Polak <vrpolak@cisco.com>
2020-08-24T-Rex: 2.82, core pin, 8 workerspmikus1-1/+1
+ Bump T-Rex version. We need new features for ASTF test. + Apply core pining. Results in a more stable performance. + Tweak the number of T-Rex workers. + We need an even value to achieve ymmetric performance with pinning. + Value 8 was selected as a best compromise. This is a combination of 3 commits. This is the 1st commit message: T-Rex: 2.82 This is the commit message #2: Change Trex to CORE_MASK_PIN mode to improve performance https://trex-tgn.cisco.com/trex/doc/trex_stateless.html#_core_masking_per_interface Above link have below explaination, "When the profile is symmetric, performance can be improved by pinning half of the cores to port 0, and half of the cores to port 1, thus avoiding cache trashing and bouncing." The reason to change this is that to run CSIT with 100G NIC often failed with "TRex stateless runtime error timeout", it caused by Trex can not send enough traffic within the fixed duration. by change to CORE_MASK_PIN mode fix the issue. Not editing ASTF, as that supports different options. This is the commit message #3: Experiment: Vary number of TRex workers With CORE_MASK_PIN, we can get more predictable time distribution. Decided to use 8 workers, that gives good results both for high end (RDMA-core l2patch) and low end (vhost) tests. Change-Id: I5c61127799e0624464e960fcb980ad1c4058e744 Signed-off-by: pmikus <pmikus@cisco.com> Signed-off-by: Yulong Pei <yulong.pei@intel.com> Signed-off-by: Vratko Polak <vrpolak@cisco.com>
2020-07-23T-Rex: Add advanced stateful modeJan Gelety1-0/+53
- provide base routines to run T-Rex in advanced stateful mode Change-Id: Ib0dc5f2919c370753335f6446860683dc4b12d93 Signed-off-by: Jan Gelety <jgelety@cisco.com>