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AgeCommit message (Expand)AuthorFilesLines
2020-03-06SKX/CLX BIOS upgradePeter Mikus2-142/+469
2020-02-17Fix: Ansible minor bugsPeter Mikus1-7/+7
2019-09-11Ansible: Cascadelake includePeter Mikus2-208/+1372
2019-08-16labs: add new Cascade Lake IPsMohammed Naser1-28/+28
2019-07-25docs: fixed TOC and list indexes in testbed specificationMaciek Konstantynowicz1-63/+63
2019-07-25docs: updated testbed specification with clx buildMaciek Konstantynowicz1-142/+408
2019-06-19Add 2-node and 3-node denverton to specificationsYulong Pei1-7/+82
2019-04-05Fixes for Taishan testbedjuraj.linkes1-6/+6
2019-03-06docs/lab: re-fixed TOC hyperlinks and editing nitsMaciek Konstantynowicz3-25/+29
2019-03-06doc/lab: fixed TOC hyperlinksMaciek Konstantynowicz3-128/+117
2019-03-06docs/lab: merged testbed specifications, separated out detailed HW and BIOS c...Maciek Konstantynowicz4-2007/+2021
2019-02-26FIX: Hardware sections - reportPeter Mikus2-673/+200
2019-02-13Add 1-node ThuderX2 arm testbedjuraj.linkes1-22/+65
2019-02-04corrects values for ARM testbed33Stanislav Chlebec1-20/+27
2019-01-11Markdown doc with FD.io CSIT physical lab design for Hsw.Maciek Konstantynowicz1-0/+1781
2019-01-11Markdown doc with FD.io CSIT physical lab design for Skx, Arm, Atom.Maciek Konstantynowicz1-0/+1386