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- Refactor Performance TCs due to changes in Hyperthreading and RXQ allocations.
- Simplify the structure of suite to avoid large refactors in future.
Change-Id: Ifb1b9719391f26745f075a900bd9fb39b6cb809c
Signed-off-by: Peter Mikus <pmikus@cisco.com>
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Due to automatization of SMT detection this change is suppose to
remove static thread/core tags in favor of dynamic one. Leaving the
static tags for number of physical cores to be able to select TCs.
Change-Id: I7f99f605821f363e45c333f46d1dea786693521b
Signed-off-by: Peter Mikus <pmikus@cisco.com>
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- Clean up of 2-node setup KWs
Change-Id: I59fc901fb57544eceb6a041b56b515cda8babf85
Signed-off-by: Peter Mikus <pmikus@cisco.com>
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- Reduce binary step fof:
64B -> 50Kpps
1518B -> 50Kpps
9000B -> 10Kpps
IMIX -> 50Kpps
Change-Id: Id88bff7b1c37b2a03583dd27ca3db720ec7ae4a2
Signed-off-by: Peter Mikus <pmikus@cisco.com>
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L2FIB scale testing for 10k, 100k, 1m FIB entries
./l2:
10ge2p1x520-eth-l2bdscale10kmaclrn-ndrpdrdisc.robot
10ge2p1x520-eth-l2bdscale100kmaclrn-ndrpdrdisc.robot
10ge2p1x520-eth-l2bdscale1mmaclrn-ndrpdrdisc.robot
10ge2p1x520-eth-l2bdscale10kmaclrn-eth-2vhostvr1024-1vm-cfsrr1-ndrpdrdisc
10ge2p1x520-eth-l2bdscale100kmaclrn-eth-2vhostvr1024-1vm-cfsrr1-ndrpdrdisc
10ge2p1x520-eth-l2bdscale1mmaclrn-eth-2vhostvr1024-1vm-cfsrr1-ndrpdrdisc
Change-Id: I7e3884bd5ab5294c289030a3465ec5b6def83cf7
Signed-off-by: Peter Mikus <pmikus@cisco.com>
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Change-Id: I772c9e214be2461adf58124998d272e7d795220f
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
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