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2023-06-19fix(infra): 3n-icx-testbed37 cx6 linkpmikus1-2/+2
Signed-off-by: pmikus <peter.mikus@protonmail.ch> Change-Id: I37404ae4033aa1ec0e2dd66f02a59cbe58a3765e
2023-06-12feat(infra): Add Mellanox CX6 to 3n-icxpmikus1-0/+48
Signed-off-by: pmikus <peter.mikus@protonmail.ch> Change-Id: Ic13b8cd3f2976c66d8956f0cee0784c3bae12a65
2023-02-10feat(infra): Infrastructure refresh part 3pmikus1-1/+1
Signed-off-by: pmikus <peter.mikus@protonmail.ch> Change-Id: I8ac1614bc3f10d2409e8305eb1726a9c3b063ae0
2022-06-23fix(infra): Topology filePeter Mikus1-1/+1
Signed-off-by: Peter Mikus <pmikus@cisco.com> Change-Id: I47cc26d500e088154ffe88aceb384128a78b70ee
2022-06-23feat(infra): Add ICXPeter Mikus1-25/+25
Signed-off-by: Peter Mikus <pmikus@cisco.com> Change-Id: I609e039026bf5cd71a06549caa0ba917579e525c
2022-05-18Add gtpu flow offload test suiteYulong Pei1-24/+24
The implementation of GTPU offload rx is to use ip4_gtpu flow MARK action of NIC and vpp flow REDIRECT_TO_NODE and BUFFER_ADVANCE fuction to direct received gtpu flow to gtpu4-flow-input graph node, skipped ethernet-input, ip4-input, ip4-lookup, ip4-local, ip4-udp-lookup normal graph node processing. Verified on 3n-clx and Intel E810 NIC environment, single core with 64B packet, performance improve ~33% that compare with pure software way. Signed-off-by: xinfeng zhao <xinfengx.zhao@intel.com> Signed-off-by: Yulong Pei <yulong.pei@intel.com> Change-Id: I2af4589448bdb1729e4ce206a8cf3a1239c61af8 Signed-off-by: Yulong Pei <yulong.pei@intel.com>
2022-01-27fix(core): 3n-icx topologyPeter Mikus1-24/+24
+ Temporarily disable, until investigated Signed-off-by: Peter Mikus <pmikus@cisco.com> Change-Id: I9fd0ec96fe27b674dfcc4a36df05cc9a7a1db6ab
2022-01-24feat(core): Add ICXPeter Mikus1-0/+228
Signed-off-by: Peter Mikus <pmikus@cisco.com> Change-Id: Ic676d00bd7d3d5d8c244bfd0eb7b10bc74498505