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# Copyright (c) 2021 Cisco and/or its affiliates.
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at:
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.

*** Settings ***
| Resource | resources/libraries/robot/shared/default.robot
|
| Force Tags | 2_NODE_SINGLE_LINK_TOPO | PERFTEST | HW_ENV | NDRPDR
| ... | NIC_Intel-X710 | ETH | IP6FWD | BASE | IP6BASE | DRV_VFIO_PCI
| ... | RXQ_SIZE_0 | TXQ_SIZE_0
| ... | ethip6-ip6base
|
| Suite Setup | Setup suite topology interfaces | performance
| Suite Teardown | Tear down suite | performance
| Test Setup | Setup test | performance
| Test Teardown | Tear down test | performance
|
| Test Template | Local Template
|
| Documentation | **Packet throughput IPv6 routing test cases**
| ... |
| ... | - **[Top] Network Topologies:** TG-DUT1-TG 2-node circular topology \
| ... | with single links between nodes.
| ... |
| ... | - **[Enc] Packet Encapsulations:** Eth-IPv6 for IPv6 routing.
| ... |
| ... | - **[Cfg] DUT configuration:** DUT1 is configured with IPv6 routing \
| ... | and two static IPv6 /64 route entries. DUT1 is tested with ${nic_name}.
| ... |
| ... | - **[Ver] TG verification:** TG finds and reports throughput NDR (Non \
| ... | Drop Rate) with zero packet loss tolerance and throughput PDR \
| ... | (Partial Drop Rate) with non-zero packet loss tolerance (LT) \
| ... | expressed in percentage of packets transmitted. NDR and PDR are \
| ... | discovered for different Ethernet L2 frame sizes using MLRsearch \
| ... | library.
| ... | Test packets are generated by TG on links to DUTs. TG traffic profile \
| ... | contains two L3 flow-groups (flow-group per direction, 253 flows per \
| ... | flow-group) with all packets containing Ethernet header, IPv6 header \
| ... | with IP protocol=61 and static payload. MAC addresses are matching MAC \
| ... | addresses of the TG node interfaces.
| ... |
| ... | - **[Ref] Applicable standard specifications:** RFC2544.

*** Variables ***
| @{plugins_to_enable}= | dpdk_plugin.so | perfmon_plugin.so
| ${crypto_type}= | ${None}
| ${nic_name}= | Intel-X710
| ${nic_driver}= | vfio-pci
| ${nic_rxq_size}= | 0
| ${nic_txq_size}= | 0
| ${nic_pfs}= | 2
| ${nic_vfs}= | 0
| ${osi_layer}= | L3
| ${overhead}= | ${0}
# Traffic profile:
| ${traffic_profile}= | trex-stl-2n-ethip6-ip6src253

*** Keywords ***
| Local Template
| | [Documentation]
| | ... | - **[Cfg]** DUT runs IPv6 routing config. \
| | ... | Each DUT uses ${phy_cores} physical core(s) for worker threads.
| | ... | - **[Ver]** Measure NDR and PDR values using MLRsearch algorithm.
| |
| | ... | *Arguments:*
| | ... | - frame_size - Framesize in Bytes in integer or string (IMIX_v4_1).
| | ... |   Type: integer, string
| | ... | - phy_cores - Number of physical cores. Type: integer
| | ... | - rxq - Number of RX queues, default value: ${None}. Type: integer
| |
| | [Arguments] | ${frame_size} | ${phy_cores} | ${rxq}=${None}
| |
| | Set Test Variable | \${frame_size}
| |
| | Given Set Max Rate And Jumbo
| | And Add worker threads to all DUTs | ${phy_cores} | ${rxq}
| | And Pre-initialize layer driver | ${nic_driver}
| | And Apply startup configuration on all VPP DUTs
| | When Initialize layer driver | ${nic_driver}
| | And Initialize layer interface
| | And Initialize IPv6 forwarding in circular topology
| | Then Find NDR and PDR intervals using optimized search

*** Test Cases ***
| 78B-1c-ethip6-ip6base-ndrpdr
| | [Tags] | 78B | 1C
| | frame_size=${78} | phy_cores=${1}

| 78B-2c-ethip6-ip6base-ndrpdr
| | [Tags] | 78B | 2C
| | frame_size=${78} | phy_cores=${2}

| 78B-4c-ethip6-ip6base-ndrpdr
| | [Tags] | 78B | 4C
| | frame_size=${78} | phy_cores=${4}

| 1518B-1c-ethip6-ip6base-ndrpdr
| | [Tags] | 1518B | 1C
| | frame_size=${1518} | phy_cores=${1}

| 1518B-2c-ethip6-ip6base-ndrpdr
| | [Tags] | 1518B | 2C
| | frame_size=${1518} | phy_cores=${2}

| 1518B-4c-ethip6-ip6base-ndrpdr
| | [Tags] | 1518B | 4C
| | frame_size=${1518} | phy_cores=${4}

| 9000B-1c-ethip6-ip6base-ndrpdr
| | [Tags] | 9000B | 1C
| | frame_size=${9000} | phy_cores=${1}

| 9000B-2c-ethip6-ip6base-ndrpdr
| | [Tags] | 9000B | 2C
| | frame_size=${9000} | phy_cores=${2}

| 9000B-4c-ethip6-ip6base-ndrpdr
| | [Tags] | 9000B | 4C
| | frame_size=${9000} | phy_cores=${4}

| IMIX-1c-ethip6-ip6base-ndrpdr
| | [Tags] | IMIX | 1C
| | frame_size=IMIX_v4_1 | phy_cores=${1}

| IMIX-2c-ethip6-ip6base-ndrpdr
| | [Tags] | IMIX | 2C
| | frame_size=IMIX_v4_1 | phy_cores=${2}

| IMIX-4c-ethip6-ip6base-ndrpdr
| | [Tags] | IMIX | 4C
| | frame_size=IMIX_v4_1 | phy_cores=${4}
>7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 }; return (u32x8) _mm256_shuffle_epi8 ((__m256i) v, (__m256i) swap); } static_always_inline u16x16 u16x16_byte_swap (u16x16 v) { u8x32 swap = { 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14 }; return (u16x16) _mm256_shuffle_epi8 ((__m256i) v, (__m256i) swap); } static_always_inline u8x32 u8x32_shuffle (u8x32 v, u8x32 m) { return (u8x32) _mm256_shuffle_epi8 ((__m256i) v, (__m256i) m); } #define u8x32_align_right(a, b, imm) \ (u8x32) _mm256_alignr_epi8 ((__m256i) a, (__m256i) b, imm) static_always_inline u32 u32x8_sum_elts (u32x8 sum8) { sum8 += (u32x8) u8x32_align_right (sum8, sum8, 8); sum8 += (u32x8) u8x32_align_right (sum8, sum8, 4); return sum8[0] + sum8[4]; } static_always_inline u32x8 u32x8_hadd (u32x8 v1, u32x8 v2) { return (u32x8) _mm256_hadd_epi32 ((__m256i) v1, (__m256i) v2); } static_always_inline u16x16 u16x16_mask_last (u16x16 v, u8 n_last) { const u16x16 masks[17] = { {0}, {-1}, {-1, -1}, {-1, -1, -1}, {-1, -1, -1, -1}, {-1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, }; ASSERT (n_last < 17); return v & masks[16 - n_last]; } static_always_inline f32x8 f32x8_from_u32x8 (u32x8 v) { return (f32x8) _mm256_cvtepi32_ps ((__m256i) v); } static_always_inline u32x8 u32x8_from_f32x8 (f32x8 v) { return (u32x8) _mm256_cvttps_epi32 ((__m256) v); } #define u32x8_blend(a,b,m) \ (u32x8) _mm256_blend_epi32 ((__m256i) a, (__m256i) b, m) #define u16x16_blend(v1, v2, mask) \ (u16x16) _mm256_blend_epi16 ((__m256i) (v1), (__m256i) (v2), mask) static_always_inline u64x4 u64x4_gather (void *p0, void *p1, void *p2, void *p3) { u64x4 r = { *(u64 *) p0, *(u64 *) p1, *(u64 *) p2, *(u64 *) p3 }; return r; } static_always_inline u32x8 u32x8_gather (void *p0, void *p1, void *p2, void *p3, void *p4, void *p5, void *p6, void *p7) { u32x8 r = { *(u32 *) p0, *(u32 *) p1, *(u32 *) p2, *(u32 *) p3, *(u32 *) p4, *(u32 *) p5, *(u32 *) p6, *(u32 *) p7, }; return r; } static_always_inline void u64x4_scatter (u64x4 r, void *p0, void *p1, void *p2, void *p3) { *(u64 *) p0 = r[0]; *(u64 *) p1 = r[1]; *(u64 *) p2 = r[2]; *(u64 *) p3 = r[3]; } static_always_inline void u32x8_scatter (u32x8 r, void *p0, void *p1, void *p2, void *p3, void *p4, void *p5, void *p6, void *p7) { *(u32 *) p0 = r[0]; *(u32 *) p1 = r[1]; *(u32 *) p2 = r[2]; *(u32 *) p3 = r[3]; *(u32 *) p4 = r[4]; *(u32 *) p5 = r[5]; *(u32 *) p6 = r[6]; *(u32 *) p7 = r[7]; } static_always_inline void u64x4_scatter_one (u64x4 r, int index, void *p) { *(u64 *) p = r[index]; } static_always_inline void u32x8_scatter_one (u32x8 r, int index, void *p) { *(u32 *) p = r[index]; } static_always_inline u8x32 u8x32_is_greater (u8x32 v1, u8x32 v2) { return (u8x32) _mm256_cmpgt_epi8 ((__m256i) v1, (__m256i) v2); } static_always_inline u8x32 u8x32_blend (u8x32 v1, u8x32 v2, u8x32 mask) { return (u8x32) _mm256_blendv_epi8 ((__m256i) v1, (__m256i) v2, (__m256i) mask); } #define u32x8_permute_lanes(a, b, m) \ (u32x8) _mm256_permute2x128_si256 ((__m256i) a, (__m256i) b, m) #define u64x4_permute_lanes(a, b, m) \ (u64x4) _mm256_permute2x128_si256 ((__m256i) a, (__m256i) b, m) static_always_inline u32x8 u32x8_min (u32x8 a, u32x8 b) { return (u32x8) _mm256_min_epu32 ((__m256i) a, (__m256i) b); } static_always_inline u32 u32x8_min_scalar (u32x8 v) { return u32x4_min_scalar (u32x4_min (u32x8_extract_lo (v), u32x8_extract_hi (v))); } static_always_inline void u32x8_transpose (u32x8 a[8]) { u64x4 r[8], x, y; r[0] = (u64x4) u32x8_interleave_lo (a[0], a[1]); r[1] = (u64x4) u32x8_interleave_hi (a[0], a[1]); r[2] = (u64x4) u32x8_interleave_lo (a[2], a[3]); r[3] = (u64x4) u32x8_interleave_hi (a[2], a[3]); r[4] = (u64x4) u32x8_interleave_lo (a[4], a[5]); r[5] = (u64x4) u32x8_interleave_hi (a[4], a[5]); r[6] = (u64x4) u32x8_interleave_lo (a[6], a[7]); r[7] = (u64x4) u32x8_interleave_hi (a[6], a[7]); x = u64x4_interleave_lo (r[0], r[2]); y = u64x4_interleave_lo (r[4], r[6]); a[0] = u32x8_permute_lanes (x, y, 0x20); a[4] = u32x8_permute_lanes (x, y, 0x31); x = u64x4_interleave_hi (r[0], r[2]); y = u64x4_interleave_hi (r[4], r[6]); a[1] = u32x8_permute_lanes (x, y, 0x20); a[5] = u32x8_permute_lanes (x, y, 0x31); x = u64x4_interleave_lo (r[1], r[3]); y = u64x4_interleave_lo (r[5], r[7]); a[2] = u32x8_permute_lanes (x, y, 0x20); a[6] = u32x8_permute_lanes (x, y, 0x31); x = u64x4_interleave_hi (r[1], r[3]); y = u64x4_interleave_hi (r[5], r[7]); a[3] = u32x8_permute_lanes (x, y, 0x20); a[7] = u32x8_permute_lanes (x, y, 0x31); } static_always_inline void u64x4_transpose (u64x4 a[8]) { u64x4 r[4]; r[0] = u64x4_interleave_lo (a[0], a[1]); r[1] = u64x4_interleave_hi (a[0], a[1]); r[2] = u64x4_interleave_lo (a[2], a[3]); r[3] = u64x4_interleave_hi (a[2], a[3]); a[0] = u64x4_permute_lanes (r[0], r[2], 0x20); a[1] = u64x4_permute_lanes (r[1], r[3], 0x20); a[2] = u64x4_permute_lanes (r[0], r[2], 0x31); a[3] = u64x4_permute_lanes (r[1], r[3], 0x31); } #endif /* included_vector_avx2_h */ /* * fd.io coding-style-patch-verification: ON * * Local Variables: * eval: (c-set-style "gnu") * End: */