summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorHanoh Haim <hhaim@cisco.com>2016-02-23 16:13:46 +0200
committerHanoh Haim <hhaim@cisco.com>2016-02-23 16:13:46 +0200
commit5a951d9435dd13b8c785969f1fd85b1c19743ab0 (patch)
tree92a91af52ddf392643922f9842c4d9cbf20a9a4f
parent36cc1ecef32dcee3640e6ddf96422c07d89777b3 (diff)
add to mask instruction add_value field
-rw-r--r--scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py5
-rw-r--r--scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py13
-rw-r--r--scripts/exp/udp_1pkt_mac_mask5.pcapbin0 -> 2304 bytes
-rw-r--r--scripts/stl/udp_1pkt_mac_mask5.py35
-rw-r--r--src/rpc-server/commands/trex_rpc_cmd_stream.cpp2
-rw-r--r--src/stateless/cp/trex_stream_vm.cpp5
-rw-r--r--src/stateless/cp/trex_stream_vm.h7
7 files changed, 59 insertions, 8 deletions
diff --git a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py
index 6fb012ca..8b9c9bac 100644
--- a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py
+++ b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py
@@ -183,13 +183,14 @@ class CStlBasic_Test(functional_general_test.CGeneralFunctional_Test):
["udp_1pkt_mac_mask2.py","-m 1 -l 20 ",True],
["udp_1pkt_mac_mask3.py","-m 1 -l 20 ",True],
["udp_1pkt_simple_test2.py","-m 1 -l 10 ",True], # test split of packet with ip option
- ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True]
+ ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True],
+ ["udp_1pkt_mac_mask5.py","-m 1 -l 30 ",True]
];
- p1 = [ ["udp_1pkt_simple_test.py","-m 1 -l 10 ",True] ]
+ p1 = [ ["udp_1pkt_mac_mask5.py","-m 1 -l 30 ",True] ]
for obj in p:
diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py
index 713769b6..e27563eb 100644
--- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py
+++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py
@@ -246,7 +246,7 @@ class CTRexVmInsWrFlowVar(CTRexVmInsBase):
assert type(is_big_endian)==bool, 'type of is_big_endian is not bool'
class CTRexVmInsWrMaskFlowVar(CTRexVmInsBase):
- def __init__(self, fv_name, pkt_offset,pkt_cast_size,mask,shift, is_big_endian=True):
+ def __init__(self, fv_name, pkt_offset,pkt_cast_size,mask,shift,add_value, is_big_endian=True):
super(CTRexVmInsWrMaskFlowVar, self).__init__("write_mask_flow_var")
self.name = fv_name
assert type(fv_name)==str, 'type of fv_name is not str'
@@ -258,6 +258,8 @@ class CTRexVmInsWrMaskFlowVar(CTRexVmInsBase):
assert type(mask)==int, 'type of mask is not int'
self.shift = shift
assert type(shift)==int, 'type of shift is not int'
+ self.add_value =add_value
+ assert type(add_value)==int, 'type of add_value is not int'
self.is_big_endian = is_big_endian
assert type(is_big_endian)==bool, 'type of is_big_endian is not bool'
@@ -590,7 +592,7 @@ class CTRexVmDescWrFlowVar(CTRexVmDescBase):
self.pkt_offset = t[0]
class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase):
- def __init__(self, fv_name, pkt_offset, pkt_cast_size=1, mask=0xff, shift=0, offset_fixup=0, is_big=True):
+ def __init__(self, fv_name, pkt_offset, pkt_cast_size=1, mask=0xff, shift=0, add_value=0, offset_fixup=0, is_big=True):
super(CTRexVmDescWrMaskFlowVar, self).__init__()
self.name =fv_name
assert type(fv_name)==str, 'type of fv_name is not str'
@@ -599,13 +601,16 @@ class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase):
self.pkt_offset =pkt_offset
self.pkt_cast_size =pkt_cast_size
assert type(pkt_cast_size)==int,'type of pkt_cast_size is not int'
- if not (pkt_cast_size in [1,2,4,8]):
+ if not (pkt_cast_size in [1,2,4]):
raise CTRexPacketBuildException(-10,"not valid cast size");
self.mask = mask
assert type(mask)==int,'type of mask is not int'
self.shift = shift
assert type(shift)==int,'type of shift is not int'
+ self.add_value = add_value
+ assert type(add_value)==int,'type of add_value is not int'
+
self.is_big =is_big;
assert type(is_big)==bool,'type of is_big_endian is not bool'
@@ -613,7 +618,7 @@ class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase):
return self.name
def get_obj (self):
- return CTRexVmInsWrMaskFlowVar(self.name,self.pkt_offset+self.offset_fixup,self.pkt_cast_size,self.mask,self.shift,self.is_big)
+ return CTRexVmInsWrMaskFlowVar(self.name,self.pkt_offset+self.offset_fixup,self.pkt_cast_size,self.mask,self.shift,self.add_value,self.is_big)
def compile(self,parent):
if type(self.pkt_offset)==str:
diff --git a/scripts/exp/udp_1pkt_mac_mask5.pcap b/scripts/exp/udp_1pkt_mac_mask5.pcap
new file mode 100644
index 00000000..cea46691
--- /dev/null
+++ b/scripts/exp/udp_1pkt_mac_mask5.pcap
Binary files differ
diff --git a/scripts/stl/udp_1pkt_mac_mask5.py b/scripts/stl/udp_1pkt_mac_mask5.py
new file mode 100644
index 00000000..07c83897
--- /dev/null
+++ b/scripts/stl/udp_1pkt_mac_mask5.py
@@ -0,0 +1,35 @@
+from trex_stl_lib.api import *
+
+
+# step is not 1.
+class STLS1(object):
+
+ def __init__ (self):
+ self.fsize =64; # the size of the packet
+
+ def create_stream (self):
+
+ # create a base packet and pad it to size
+ size = self.fsize - 4; # no FCS
+ base_pkt = Ether()/IP(src="16.0.0.1",dst="48.0.0.1")/UDP(dport=12,sport=1025)
+ pad = max(0, size - len(base_pkt)) * 'x'
+
+ vm = CTRexScRaw( [ STLVmFlowVar(name="mac_src", min_value=0, max_value=10, size=2, op="inc",step=1),
+ STLVmWrMaskFlowVar(fv_name="mac_src", pkt_offset= 10,pkt_cast_size=1, mask=0xff,add_value=5,shift=0) # range is 5-15
+ ]
+ )
+
+ return STLStream(packet = STLPktBuilder(pkt = base_pkt/pad,vm = vm),
+ mode = STLTXCont( pps=10 ))
+
+ def get_streams (self, direction = 0):
+ # create 1 stream
+ return [ self.create_stream() ]
+
+
+# dynamic load - used for trex console or simulator
+def register():
+ return STLS1()
+
+
+
diff --git a/src/rpc-server/commands/trex_rpc_cmd_stream.cpp b/src/rpc-server/commands/trex_rpc_cmd_stream.cpp
index 50295c7c..93a680c9 100644
--- a/src/rpc-server/commands/trex_rpc_cmd_stream.cpp
+++ b/src/rpc-server/commands/trex_rpc_cmd_stream.cpp
@@ -319,6 +319,7 @@ TrexRpcCmdAddStream::parse_vm_instr_write_mask_flow_var(const Json::Value &inst,
uint16_t pkt_cast_size = parse_uint16(inst, "pkt_cast_size", result);
uint32_t mask = parse_uint32(inst, "mask", result);
int shift = parse_int(inst, "shift", result);
+ int add_value = parse_int(inst, "add_value", result);
bool is_big_endian = parse_bool(inst, "is_big_endian", result);
stream->m_vm.add_instruction(new StreamVmInstructionWriteMaskToPkt(flow_var_name,
@@ -326,6 +327,7 @@ TrexRpcCmdAddStream::parse_vm_instr_write_mask_flow_var(const Json::Value &inst,
(uint8_t)pkt_cast_size,
mask,
shift,
+ add_value,
is_big_endian));
}
diff --git a/src/stateless/cp/trex_stream_vm.cpp b/src/stateless/cp/trex_stream_vm.cpp
index b0cadfb6..d8395ba4 100644
--- a/src/stateless/cp/trex_stream_vm.cpp
+++ b/src/stateless/cp/trex_stream_vm.cpp
@@ -84,7 +84,7 @@ void StreamVmInstructionFlowMan::sanity_check(uint32_t ins_id,StreamVm *lp){
void StreamVmInstructionWriteMaskToPkt::Dump(FILE *fd){
- fprintf(fd," flow_var:%s, offset:%lu, cast_size:%lu, mask:0x%lx, shift:%ld, is_big:%lu \n",m_flow_var_name.c_str(),(ulong)m_pkt_offset,(ulong)m_pkt_cast_size,(ulong)m_mask,(long)m_shift,(ulong)(m_is_big_endian?1:0));
+ fprintf(fd," flow_var:%s, offset:%lu, cast_size:%lu, mask:0x%lx, shift:%ld, add:%ld, is_big:%lu \n",m_flow_var_name.c_str(),(ulong)m_pkt_offset,(ulong)m_pkt_cast_size,(ulong)m_mask,(long)m_shift,(long)m_add_value,(ulong)(m_is_big_endian?1:0));
}
@@ -735,6 +735,7 @@ void StreamVm::build_program(){
pmask.m_flags = flags;
pmask.m_var_offset = flow_offset;
pmask.m_shift = lpPkt->m_shift;
+ pmask.m_add_value = lpPkt->m_add_value;
pmask.m_pkt_cast_size = cast_size;
pmask.m_flowv_cast_size = op_size;
pmask.m_pkt_offset = lpPkt->m_pkt_offset;
@@ -1343,6 +1344,8 @@ void StreamDPOpPktWrMask::wr(uint8_t * flow_var_base,
assert(0);
}
+ val+=m_add_value;
+
/* shift the flow var val */
if (m_shift>0) {
val=val<<m_shift;
diff --git a/src/stateless/cp/trex_stream_vm.h b/src/stateless/cp/trex_stream_vm.h
index 0bd00711..f5d58edd 100644
--- a/src/stateless/cp/trex_stream_vm.h
+++ b/src/stateless/cp/trex_stream_vm.h
@@ -444,6 +444,7 @@ struct StreamDPOpPktWrMask {
uint8_t m_flowv_cast_size; /* 1,2,4 */
uint16_t m_pkt_offset;
uint32_t m_mask;
+ int32_t m_add_value;
bool is_big(){
return ( (m_flags &StreamDPOpPktWrMask::MASK_PKT_WR_IS_BIG) == StreamDPOpPktWrMask::MASK_PKT_WR_IS_BIG ?true:false);
}
@@ -1037,12 +1038,14 @@ public:
uint8_t pkt_cast_size, /* valid 1,2,4 */
uint32_t mask,
int shift, /* positive is shift left, negetive shift right */
+ int32_t add_value = 0,
bool is_big_endian = true) :
m_flow_var_name(flow_var_name),
m_pkt_offset(pkt_offset),
m_pkt_cast_size(pkt_cast_size),
m_mask(mask),
m_shift(shift),
+ m_add_value(add_value),
m_is_big_endian(is_big_endian) {}
virtual instruction_type_t get_instruction_type() const {
@@ -1057,6 +1060,7 @@ public:
m_pkt_cast_size,
m_mask,
m_shift,
+ m_add_value,
m_is_big_endian);
}
@@ -1070,7 +1074,8 @@ public:
uint8_t m_pkt_cast_size; /* valid 1,2,4 */
uint32_t m_mask;
- int m_shift;
+ int m_shift;
+ int m_add_value;
bool m_is_big_endian;
};