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authorHanoh Haim <hhaim@cisco.com>2016-06-22 19:16:05 +0300
committerHanoh Haim <hhaim@cisco.com>2016-06-22 19:16:05 +0300
commit776aff59c30d204a953e5b3a42172e828f030da6 (patch)
treee278105166f5b3096ebec7441849d0d4fae34d24 /scripts/automation/regression/stateless_tests/stl_rx_test.py
parent06b5ac67155c1c0bbe5d779755f9b3ff759cb8ad (diff)
minor
Diffstat (limited to 'scripts/automation/regression/stateless_tests/stl_rx_test.py')
-rw-r--r--scripts/automation/regression/stateless_tests/stl_rx_test.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/scripts/automation/regression/stateless_tests/stl_rx_test.py b/scripts/automation/regression/stateless_tests/stl_rx_test.py
index bf46bc20..84f32081 100644
--- a/scripts/automation/regression/stateless_tests/stl_rx_test.py
+++ b/scripts/automation/regression/stateless_tests/stl_rx_test.py
@@ -329,7 +329,7 @@ class STLRX_Test(CStlGeneral_Test):
s_port=random.sample(all_ports, random.randint(1, len(all_ports)) )
s_port=sorted(s_port)
if self.speed == 40 :
- # the NIC does not support all full rate in case both port works let's
+ # the NIC does not support all full rate in case both port works let's filter odd ports
tmp_l=[]
for port in s_port:
if ((int(port) % 2) ==0):