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authorHanoh Haim <hhaim@cisco.com>2016-06-27 13:43:01 +0300
committerHanoh Haim <hhaim@cisco.com>2016-06-27 13:43:01 +0300
commit3c693c4d3a57c8567c5e2a8327deb70a08be9a14 (patch)
tree9c00ef565f1f50318d8bf1bdf9b0f3198c05fb89 /scripts/automation/regression
parentbee4308547e9f9a8850bceb929981cf5c780e220 (diff)
fix trex-218 & trex-219
Diffstat (limited to 'scripts/automation/regression')
-rw-r--r--scripts/automation/regression/stateless_tests/stl_rx_test.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/scripts/automation/regression/stateless_tests/stl_rx_test.py b/scripts/automation/regression/stateless_tests/stl_rx_test.py
index 36f17170..16029908 100644
--- a/scripts/automation/regression/stateless_tests/stl_rx_test.py
+++ b/scripts/automation/regression/stateless_tests/stl_rx_test.py
@@ -428,7 +428,7 @@ class STLRX_Test(CStlGeneral_Test):
self.check_stats (stats,ls['tx_pkts'][pid], pkts,"ls['tx_pkts'][pid]")
self.check_stats (stats,ls['tx_bytes']['total'], tbytes,"ls['tx_bytes']['total']")
- self.check_stats (stats,ls['tx_bytes'][pid], pkts+1,"ls['tx_bytes'][pid]")
+ self.check_stats (stats,ls['tx_bytes'][pid], tbytes,"ls['tx_bytes'][pid]")
return 0
@@ -448,7 +448,7 @@ class STLRX_Test(CStlGeneral_Test):
for port in all_ports:
for l in [True,False]:
print(" test port {0} latency : {1} ".format(port,l))
- self.send_1_burst(port,False,100)
+ self.send_1_burst(port,l,100)
# this test adds more and more latency streams and re-test with incremental