diff options
author | Yaroslav Brustinov <ybrustin@cisco.com> | 2016-02-21 18:01:36 +0200 |
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committer | Yaroslav Brustinov <ybrustin@cisco.com> | 2016-02-21 18:01:36 +0200 |
commit | 6182075a09042c2d72f16a434b7978615143f589 (patch) | |
tree | a1638ca143c1e4dc029fa865aa42cb48d2c8c1ff /scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py | |
parent | 2f75f197b0f948aa53e88e479d85cf83a64057c4 (diff) |
typo in step and min/max_value; support old-type classes in validate_type; assert positive values in python; hlt fix vlan vm + test for it;
Diffstat (limited to 'scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py')
-rw-r--r-- | scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py index fc4750c3..713769b6 100644 --- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py +++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py @@ -222,12 +222,16 @@ class CTRexVmInsFlowVar(CTRexVmInsBase): self.op = op self.init_value = init_value assert type(init_value)==int, 'type of init_value is not int' + assert init_value >= 0, 'init_value (%s) is negative' % init_value self.min_value=min_value assert type(min_value)==int, 'type of min_value is not int' + assert min_value >= 0, 'min_value (%s) is negative' % min_value self.max_value=max_value - assert type(max_value)==int, 'type of min_value is not int' + assert type(max_value)==int, 'type of max_value is not int' + assert max_value >= 0, 'max_value (%s) is negative' % max_value self.step=step assert type(step)==int, 'type of step should be int' + assert step >= 0, 'step (%s) is negative' % step class CTRexVmInsWrFlowVar(CTRexVmInsBase): def __init__(self, fv_name, pkt_offset, add_value=0, is_big_endian=True): |