diff options
author | Hanoh Haim <hhaim@cisco.com> | 2016-03-01 13:49:56 +0200 |
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committer | Hanoh Haim <hhaim@cisco.com> | 2016-03-01 13:49:56 +0200 |
commit | 0af59f17029acc700b3a8bc569e05b5603d0a114 (patch) | |
tree | 963fe5a32c886d09875c1e82acdc824473db4545 /scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py | |
parent | b85911614786e4b507d31fe38e1aaa9e4fe0136c (diff) |
add --pkt to stl-sim
Diffstat (limited to 'scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py')
-rw-r--r-- | scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py index 54d699d8..9db34737 100644 --- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py +++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py @@ -123,7 +123,7 @@ class STLSim(object): duration = -1, mode = 'none'): - if not mode in ['none', 'gdb', 'valgrind', 'json', 'yaml']: + if not mode in ['none', 'gdb', 'valgrind', 'json', 'yaml','pkt']: raise STLArgumentError('mode', mode) # listify @@ -208,6 +208,10 @@ class STLSim(object): elif mode == 'yaml': print STLProfile(stream_list).dump_to_yaml() return + elif mode == 'pkt': + print STLProfile(stream_list).dump_as_pkt(); + return + # start simulation self.outfile = outfile @@ -392,6 +396,11 @@ def setParserOptions(): action = "store_true", default = False) + group.add_argument("--pkt", + help = "Parse the packet and show it as hex", + action = "store_true", + default = False) + group.add_argument("--yaml", help = "generate YAML from input file [default is False]", action = "store_true", @@ -427,6 +436,8 @@ def main (): mode = 'json' elif options.yaml: mode = 'yaml' + elif options.pkt: + mode = 'pkt' else: mode = 'none' |