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authorimarom <imarom@cisco.com>2016-02-16 03:49:36 -0500
committerimarom <imarom@cisco.com>2016-02-16 06:14:41 -0500
commit8f6067d8738fa77a147955ee208ece8dea198111 (patch)
tree738a8fe43da5ec2045e568d9c2c822b29732a7db /scripts/automation/trex_control_plane/stl
parent16270f0ee64b0981c6c6dcd2bbff230172f67ee3 (diff)
help was broken in the simulator
also some more bugs
Diffstat (limited to 'scripts/automation/trex_control_plane/stl')
-rw-r--r--scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_port.py4
-rw-r--r--scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py11
-rw-r--r--scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py2
-rwxr-xr-xscripts/automation/trex_control_plane/stl/trex_stl_lib/utils/parsing_opts.py2
4 files changed, 6 insertions, 13 deletions
diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_port.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_port.py
index c3fa70ec..838a49ed 100644
--- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_port.py
+++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_port.py
@@ -57,7 +57,7 @@ class Port(object):
def err(self, msg):
- return RC_ERR("port {0} : {1}".format(self.port_id, msg))
+ return RC_ERR("port {0} : {1}\n".format(self.port_id, msg))
def ok(self, data = ""):
return RC_OK(data)
@@ -203,7 +203,7 @@ class Port(object):
rc = self.transmit_batch(batch)
if not rc:
- return self.err(rc.err())
+ return self.err(str(rc))
# the only valid state now
diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py
index 380b7a39..907125e9 100644
--- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py
+++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_sim.py
@@ -27,8 +27,6 @@ from trex_stl_client import STLClient
import re
import json
-import zlib
-import struct
import argparse
@@ -218,19 +216,14 @@ class STLSim(object):
# internal run
- def __run (self, cmds_json, zipped = True):
+ def __run (self, cmds_json):
# write to temp file
f = tempfile.NamedTemporaryFile(delete = False)
msg = json.dumps(cmds_json)
- # stress the zip path
- if zipped:
- compressed = zlib.compress(msg)
- new_msg = struct.pack(">II", 0xABE85CEA, len(msg)) + compressed
-
- f.write(new_msg)
+ f.write(msg)
f.close()
# launch bp-sim
diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py
index 68f8f694..130beabe 100644
--- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py
+++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_streams.py
@@ -111,7 +111,7 @@ class STLStream(object):
rx_stats = None,
next = None,
stream_id = None,
- action_count =0,
+ action_count = 0,
mac_src_override_by_pkt=None,
mac_dst_override_mode=None #see STLStreamDstMAC_xx
):
diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/utils/parsing_opts.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/utils/parsing_opts.py
index 58306c5a..84dd5090 100755
--- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/utils/parsing_opts.py
+++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/utils/parsing_opts.py
@@ -71,7 +71,7 @@ match_multiplier_help = """Multiplier should be passed in the following format:
will provide a percentage of the line rate. examples
'-m 10', '-m 10kbps', '-m 10mpps', '-m 23%%'
- '-m 23%%' : is 23% L1 bandwidth
+ '-m 23%%' : is 23%% L1 bandwidth
'-m 23mbps' : is 23mbps in L2 bandwidth (including FCS+4)
"""